Silicon-Insulator-Silicon Modulator With Low-Voltage Phase Shift
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Solution Overview
Problem
Existing photonic modulators in silicon photonics face limitations in achieving large optical phase shifts with reduced optical insertion loss, as they require higher voltages and have higher insertion losses compared to p-n junction modulators.
Innovation Solution
The development of a semiconductor-insulator-capacitor (SISCAP) modulator with a thin SiON insulator layer having a high dielectric constant, which reduces the voltage required for a 180-degree phase shift and minimizes optical insertion loss by optimizing the thickness and doping of silicon and polysilicon terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a p-n junction modulator is used to achieve large optical phase shifts, then the optical phase shift is large, but the required voltage is high and optical insertion loss is high
Solution Approach 1:
The patent changes the electrical parameters of the modulator by introducing a dual-gate structure with independent voltage control. By adjusting the gate voltages (Vgs1 and Vgs2), the device can achieve large optical phase shifts at lower voltages compared to conventional p-n junction modulators, directly addressing the high voltage requirement issue
Solution Approach 2:
The patent employs a composite structure combining silicon waveguide with semiconductor layers (such as GeSi or InGaAsP) and insulator layers. This composite material approach enables enhanced electro-optic modulation efficiency, achieving large phase shifts with reduced voltage while maintaining low optical insertion loss through optimized material composition and layer configuration
2Measurement precision
If a p-n junction modulator is used to achieve large optical phase shifts, then the optical phase shift is large, but the optical insertion loss is high
Solution Approach 1:
The patent optimizes the geometric parameters of the modulator structure, including waveguide dimensions, semiconductor layer thickness, and gate spacing. These parameter adjustments enable achieving large optical phase shifts while minimizing optical insertion loss by optimizing the overlap between optical mode and modulation region, thereby reducing unnecessary optical absorption and scattering losses
3Use of energy by moving object
If the insulator layer thickness is increased to reduce capacitance, then the voltage requirement is reduced, but the coupling efficiency decreases
Solution Approach 1:
The patent optimizes the insulator layer thickness to achieve an optimal balance between capacitance reduction and coupling efficiency maintenance. By carefully selecting the insulator thickness parameter, the device achieves reduced voltage requirements while preserving sufficient electrical coupling for effective modulation
Solution Approach 2:
The patent uses composite dielectric structures, such as combining SiO2 with low-k materials or using graded-index insulator layers, to reduce parasitic capacitance while maintaining effective electrical coupling. This composite approach allows achieving lower voltage requirements without sacrificing coupling efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The SISCAP modulator achieves larger optical phase shifts with lower applied voltages and reduced optical insertion loss, making it more efficient than traditional p-n junction modulators.
Implementation Method 1
a capacitor dielectric layer (1902) disposed between the first terminal (302a) and the second terminal (302b)
Implementation Method 2
a waveguide structure (308) optically connected with the first terminal (302a)
Data Source
AI summary
An embodiment photonic device may include a first terminal including silicon and a waveguide structure optically connected with the first terminal, a cladding dielectric layer formed around the first terminal including the waveguide structure, a second terminal including polysilicon, and a capacitor dielectric layer disposed between the first terminal and the second terminal. The capacitor dielectric layer may include a SiON layer. The waveguide structure may include a first index of refraction in response to an application of a first voltage difference between the first terminal and the second terminal and a second index of refraction in response to an application of a second voltage difference between the first terminal and the second terminal. The silicon of the first terminal may include a p-typed doping and the polysilicon of the second terminal may include an n-type doping.