Silicon Nitride Cover Layer for Nonvolatile Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In nonvolatile semiconductor memory devices, the miniaturization of memory cells leads to challenges in maintaining consistent current flow and cell characteristics due to differences in contact hole diameters, causing etching issues and potential differences in substrate surface levels, which deteriorate cell reliability and electrical characteristics.
Innovation Solution
A cover layer structure comprising a thin first silicon nitride layer, a silicon oxide intermediate layer, and a thicker second silicon nitride layer is used, with the silicon oxide layer formed by heat-treating the surface of the first silicon nitride layer to reduce hydrogen emission and act as an etching stopper, preventing substrate rutting and impurity penetration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If memory cells are miniaturized to increase storage capacity, then device integration density is improved, but cell characteristics consistency deteriorates due to contact hole diameter variations
Solution Approach 1:
The patent changes the physical and chemical parameters of the cover layer by using a stacked structure of silicon nitride and silicon oxide layers with specific thickness ratios. This parameter optimization ensures consistent etching rates and hydrogen emission characteristics across miniaturized memory cells, maintaining cell characteristics consistency despite size reduction.
Solution Approach 2:
The patent employs a composite cover layer structure combining silicon nitride and silicon oxide materials. This composite approach leverages the hydrogen emission properties of silicon nitride and the etching stopper properties of silicon oxide to simultaneously address multiple issues arising from memory cell miniaturization, improving both reliability and consistency.
2Device complexity
If a single-layer silicon nitride cover layer is used, then manufacturing process is simplified, but hydrogen emission causes electron trapping and depleting action on substrate
Solution Approach 1:
The patent extracts the hydrogen emission function from the cover layer by selectively removing the silicon nitride layer in patterned regions. This allows hydrogen to be emitted only from designated areas, preventing electron trapping in memory cells while maintaining the depleting action in peripheral regions where it is beneficial for preventing hot carrier injection.
Solution Approach 2:
The patent applies different qualities to different parts of the cover layer by using a stacked structure where silicon nitride layers are present only in peripheral regions and absent in memory cell regions. This local differentiation enables selective hydrogen emission, resolving the harmful effects while preserving beneficial effects in specific areas.
3Productivity
If etching is performed without proper cover layer control, then manufacturing process is faster, but substrate surface level differences occur causing potential variations
Solution Approach 1:
The patent performs preliminary action by forming a thick silicon oxide layer beneath the silicon nitride cover layer before etching. This pre-formed layer acts as an etching stopper that prevents excessive etching and substrate rutting, ensuring consistent substrate surface levels across the wafer even when etching is performed at high speeds.
Solution Approach 2:
The patent introduces a silicon oxide intermediate layer as a mediator between the silicon nitride cover layer and the substrate. This intermediate layer controls the etching process by providing a stopper function, preventing direct contact between the etchant and substrate, thereby maintaining surface level consistency while allowing fast etching of the cover layer.
4Reliability
If silicon nitride layer is made thicker to improve etching stopper function, then etching control is improved, but hydrogen emission increases causing more electron traps
Solution Approach 1:
The patent segments the cover layer into multiple thin silicon nitride layers separated by silicon oxide layers. This segmentation maintains the etching stopper function through the cumulative thickness of silicon nitride while reducing hydrogen emission by isolating hydrogen sources with silicon oxide barriers, thereby reducing electron trap formation.
Solution Approach 2:
The patent uses silicon oxide layers as intermediary barriers between silicon nitride layers. These intermediary layers block hydrogen diffusion paths, preventing hydrogen from reaching the substrate and forming electron traps, while still allowing the overall structure to provide sufficient etching stopper function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures reliable etching, suppresses hydrogen traps, and maintains cell characteristics by controlling the thickness and composition of the cover layer, preventing electron trapping and improving film quality, thus enhancing the overall performance and reliability of the memory device.
Implementation Method 1
the silicon oxide layer formed by heat-treating the surface of the first silicon nitride layer
Data Source
AI summary
A nonvolatile semiconductor memory device comprises: a substrate; a memory cell that is disposed on the substrate and accumulates a charge as data; and a cover layer covering the memory cell. The cover layer has a structure in which a first silicon nitride layer, an intermediate layer, and a second silicon nitride layer are stacked sequentially from a memory cell side.