Silicon Nitride Spacer Formation for Metal Drain Isolation
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Solution Overview
Problem
Existing semiconductor device manufacturing processes remove portions of spacers during the manufacturing of field-effect transistors, leading to increased likelihood of defects such as dark voltage contrast (DVC) and bright voltage contrast (BVC) defects due to reduced effectiveness in preventing current leakage between the metal drain and gate.
Innovation Solution
A method involving the deposition of a topography selective silicon nitride layer as a sacrificial layer to form spacers for the metal drain, which includes specific thickness ranges and densities to prevent etching loss and reduce defects, ensuring effective current isolation and defect reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If portions of spacers are removed during manufacturing, then manufacturing process is simplified, but defect likelihood increases due to reduced current isolation effectiveness
Solution Approach 1:
The patent forms a sacrificial silicon nitride layer before metal drain deposition, which serves as a preliminary spacer structure. This layer is deposited with specific thickness (5-20 nm) and density control to ensure it provides adequate current isolation during subsequent processing steps, preventing DVC and BVC defects while allowing manufacturing to proceed
2Device complexity
If spacer thickness is reduced to simplify manufacturing, then manufacturing complexity decreases, but current leakage prevention effectiveness deteriorates
Solution Approach 1:
The patent specifies precise parameter ranges for the silicon nitride spacer layer: thickness of 5-20 nm and density of 2.0-2.5 g/cm³. These parameter optimizations ensure the spacer provides sufficient current isolation without requiring excessive thickness, thereby preventing leakage while maintaining manufacturing feasibility and avoiding device complexity
3Ease of manufacture
If etching process is applied to remove sacrificial layer, then spacer formation is enabled, but etching loss of spacer material occurs leading to defects
Solution Approach 1:
The patent employs a sacrificial silicon nitride layer that is intentionally designed to be temporary and removable. This sacrificial layer is deposited with controlled thickness and density, then selectively removed via etching to create the final spacer structure. The sacrificial nature allows precise spacer formation through etching while accepting that the sacrificial material itself will be consumed, thereby achieving manufacturing precision without permanent loss of functional spacer material
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces the likelihood of defects and current leakage between the metal drain and gate, enhancing the reliability and performance of semiconductor devices by maintaining spacer thickness and preventing etching loss, thereby improving device integrity.
Implementation Method 1
depositing a topography selective silicon nitride layer
Implementation Method 2
ensuring effective current isolation and defect reduction... preventing etching loss
Data Source
AI summary
A method may include forming a first silicon nitride layer in an opening of the semiconductor device and on a top surface of the semiconductor device, wherein the semiconductor device includes an epitaxial source/drain and a metal gate. The method may include forming a second silicon nitride layer on the first silicon nitride layer, as a sacrificial layer, and removing the second silicon nitride layer from sidewalls of the first silicon nitride layer formed in the opening. The method may include removing the second silicon nitride layer and the first silicon nitride layer formed at a bottom of the opening, and depositing a metal layer in the opening to form a metal drain in the opening of the semiconductor device.