Monolithic Silicon Optocoupler Circuit for Galvanic Isolation
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Solution Overview
Problem
Existing optocoupler circuits face challenges such as signal delays and complexity due to the need for galvanic isolation between circuits operating at different voltages, which complicates their implementation and increases costs.
Innovation Solution
A monolithically integrated optocoupler circuit using a silicon-on-insulator substrate with a silicon-based light-emitting diode and photodetector, where a local oxidation of silicon (LOCOS) isolation material and buried insulator layer provide galvanic isolation, allowing optical communication between circuits while preventing charge carrier flow, and a waveguide optically couples the LED and photodetector for efficient signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If optocoupler circuits are combined with other chips in a package to achieve galvanic isolation, then galvanic isolation is achieved, but signal delays increase and device complexity increases
Solution Approach 1:
The patent merges the optocoupler circuit with other circuits onto a single chip, eliminating the need for separate packages. The insulator layer integrates galvanic isolation functionality within the same substrate, combining multiple functions (optical coupling, electrical isolation, and signal processing) into one unified device, thereby reducing overall system complexity while maintaining isolation benefits
Solution Approach 2:
The patent introduces an insulator layer as an intermediary between the first and second circuits, positioned between the LED and photodetector. This intermediary provides the necessary galvanic isolation while allowing optical signals to pass through, resolving the contradiction by mediating between the need for electrical isolation and the need for efficient signal transmission
2Reliability
If optocoupler circuits are combined with other chips in a package to achieve galvanic isolation, then galvanic isolation is achieved, but signal delays increase
Solution Approach 1:
By merging all circuit components onto a single chip with minimal spacing, the patent eliminates the long signal paths through package interconnections. The integrated layout reduces transmission distance and minimizes signal delays while maintaining galvanic isolation through the insulator layer
Solution Approach 2:
The patent utilizes vertical layering (insulator layer between circuits) to achieve galvanic isolation in the vertical dimension, allowing horizontal signal paths to remain short and direct. This dimensional separation enables isolation without compromising signal transmission efficiency
3Ease of manufacture
If circuits operating at significantly different voltages are integrated on the same chip, then manufacturing complexity is reduced, but galvanic isolation becomes more challenging
Solution Approach 1:
The patent segments the chip into distinct isolated regions (first circuit and second circuit) separated by insulator layers. This segmentation allows different voltage domains to coexist on the same substrate while maintaining electrical isolation, making high-voltage and low-voltage integration feasible without compromising isolation reliability
Solution Approach 2:
The insulator layer acts as an intermediary that enables safe coexistence of different voltage levels on the same chip. It provides the necessary electrical isolation for high-voltage circuits while allowing low-voltage circuits to operate nearby, facilitating multi-voltage integration without direct electrical interference
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables efficient galvanic isolation between circuits operating at significantly different voltages, reducing signal delays and complexity, and facilitates the integration of high-voltage and low-voltage circuits on a single chip, thereby simplifying manufacturing and reducing costs while maintaining effective communication.
Implementation Method 1
a silicon-based light-emitting diode and photodetector
Implementation Method 2
The LED has a silicon p-n junction in the silicon layer and connected to a first circuit in the silicon layer, with the silicon p-n junction being configured to operate in a forward-biased state
Implementation Method 3
a silicon-based photodetector is also located in the silicon layer and is connected to a second circuit in the silicon layer
Implementation Method 4
A waveguide optically couples the LED and photodetector for efficient signal transmission
Implementation Method 5
A local oxidation of silicon (LOCOS) isolation material and buried insulator layer galvanically isolate the first circuit from the second circuit to prevent charge carriers from moving therebetween
Data Source
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AI summary
An optocoupler device facilitates on-chip galvanic isolation. In accordance with various example embodiments, an optocoupler circuit includes a silicon-on-insulator substrate having a silicon layer on a buried insulator layer, a silicon-based light-emitting diode (LED) having a silicon p-n junction in the silicon layer, and a silicon-based photodetector in the silicon layer. The LED and photodetector are respectively connected to galvanically isolated circuits in the silicon layer. A local oxidation of silicon (LOCOS) isolation material and the buried insulator layer galvanically isolate the first circuit from the second circuit to prevent charge carriers from moving between the first and second circuits. The LED and photodetector communicate optically to pass signals between the galvanically isolated circuits.