Thin-Film Storage Transistor With Silicon-Oxide-Nitride Trapping for Retention
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Solution Overview
Problem
Existing thin-film storage transistors using silicon-silicon nitride charge trapping layers face issues with low data retention time, high susceptibility to read disturb, and high leakage current, which affect their performance and reliability.
Innovation Solution
Incorporating a silicon-silicon oxide-silicon nitride charge trapping layer in thin-film storage transistors, which improves data retention, reduces read disturb, and enhances ON state current while minimizing OFF state leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a silicon-silicon nitride charge trapping layer is used in thin-film storage transistors, then the transistor can store charge, but the data retention time is low and leakage current is high
Solution Approach 1:
The patent applies composite materials by creating a charge trapping layer with a silicon-silicon oxide-silicon nitride structure. This composite layer combines silicon (providing charge trapping sites), silicon oxide (providing tunneling barrier and structural stability), and silicon nitride (providing additional charge trapping capacity). The composite structure achieves superior data retention and reduced leakage current compared to simple silicon-nitride layers, as the synergistic interaction between materials creates both deep trap states for charge retention and controlled tunneling barriers to prevent leakage.
Solution Approach 2:
The patent implements local quality by creating distinct regions within the charge storage film with different compositions and functions. The charge trapping layer has a specific silicon-silicon oxide-silicon nitride composition optimized for charge retention, while adjacent tunneling dielectric layers have compositions optimized for electron tunneling control. This spatial differentiation of material properties allows the structure to simultaneously achieve high data retention in the trapping region and low leakage through controlled tunneling barriers in adjacent regions.
2Duration of action of stationary object
If a charge trapping layer is used to store data, then data retention is improved, but the transistor becomes more susceptible to read disturb
Solution Approach 1:
The patent applies parameter changes by precisely controlling the composition ratios and thicknesses within the charge trapping layer. By adjusting the silicon-to-silicon oxide-to-silicon nitride ratios and optimizing layer thicknesses, the patent creates optimal trap depth distributions and tunneling barrier heights. These parameter optimizations ensure that charge can be retained for extended periods while minimizing the sensitivity to read operations, as the deep trap states require higher energy perturbations to disturb, making the stored data more robust against read disturb effects.
3Object-generated harmful factors
If the charge storage film structure is optimized for data retention, then leakage current decreases, but ON state current may be reduced
Solution Approach 1:
The patent implements segmentation by dividing the charge storage film into distinct functional layers: tunneling dielectric layers, charge trapping layers with silicon-silicon oxide-silicon nitride composition, and blocking layers. Each segment is optimized for its specific function - tunneling layers for controlled charge injection/extraction, trapping layers for charge storage with low leakage, and blocking layers for preventing charge loss. This segmentation allows the structure to achieve low OFF-state leakage through optimized trapping while maintaining high ON-state current through efficient tunneling pathways in the segmented architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The silicon-silicon oxide-silicon nitride layer enhances data retention, reduces read disturb, and increases ON state current while decreasing OFF state leakage, resulting in improved performance and reliability of thin-film storage transistors.
Implementation Method 1
a tunneling dielectric layer formed adjacent the channel region
Implementation Method 2
a charge trapping layer formed adjacent the tunneling dielectric layer where the charge trapping layer is a layer including silicon, silicon oxide and silicon nitride materials
Data Source
AI summary
A thin-film storage transistor includes a charge storage film provided between a channel region and a gate conductor where the charge storage film includes a tunneling dielectric layer formed adjacent the channel region and a charge trapping layer formed adjacent the tunneling dielectric layer. In some embodiments, the charge trapping layer is a layer including silicon, silicon oxide and silicon nitride materials. In one embodiment, the charge trapping layer is a layer including a mixture of silicon, silicon oxide and silicon nitride materials, where the silicon oxide and silicon nitride may or may not be their respective stoichiometric compounds.

