Stacked Silicon-Oxide Pixel Circuit for High-Resolution Displays
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Solution Overview
Problem
The challenge is to enhance the resolution of display devices mounted on head-mounted displays while minimizing bezel size and achieving a low-power, uncomplicated circuit design, as existing transistors on silicon on insulator substrates face limitations in current supply capability and circuit layout due to high field-effect mobility and leakage currents.
Innovation Solution
The solution involves a display device with a pixel circuit comprising a first transistor with a silicon channel formation region for driving a light-emitting element and a second transistor with a metal oxide channel formation region acting as a switch, arranged in separate layers to increase layout area and withstand voltage, allowing for a larger channel length and adjusted current supply capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the channel length is increased to obtain high withstand voltage, then the transistor can handle higher voltages, but the circuit layout becomes greatly restricted
Solution Approach 1:
The patent transitions from planar transistor layouts to three-dimensional stacked transistor structures. Multiple transistor layers are stacked vertically, allowing the channel length to be extended in the vertical dimension rather than being constrained to horizontal plane, thus achieving high withstand voltage without restricting circuit layout
2Manufacturing precision
If the resolution of the display portion is increased, then the display quality improves, but the current flowing into the display element decreases due to reduced area
Solution Approach 1:
The stacked transistor structure enables vertical stacking of multiple transistors within the same planar footprint. This three-dimensional arrangement increases the effective current supply capability without increasing the horizontal area, allowing high resolution displays to maintain sufficient current drive for the reduced pixel area
Solution Approach 2:
Multiple transistor functions are merged into a compact stacked structure where lower-layer transistors provide current supply and upper-layer transistors provide switching control. This consolidation delivers enhanced current capability within the constrained pixel area required for high resolution
3Power
If transistors with high field-effect mobility are used, then the current supply capability is excessively high, but this makes it difficult to drive the display element with proper current
Solution Approach 1:
The transistor system is segmented into multiple layers with distinct functions. Lower-layer transistors with high field-effect mobility provide current supply capability, while upper-layer transistors provide switching and control functions. This segmentation allows independent optimization of each layer's characteristics to achieve both high current capability and precise control
Solution Approach 2:
Different transistor layers are assigned different material compositions and structural characteristics tailored to their specific functions. The lower-layer transistors use materials optimized for high current supply, while upper-layer transistors use materials optimized for switching control, achieving local optimization of electrical characteristics
Data Source
AI summary
A display device including a display portion with an extremely high resolution is provided. The display device includes a pixel circuit and a light-emitting element. The pixel circuit includes a first element layer including a first transistor and a second element layer including a second transistor. A channel formation region of the first transistor includes silicon. The first transistor has a function of driving the light-emitting element. The second transistor functions as a switch. A channel formation region of the second transistor includes a metal oxide. The metal oxide functions as a semiconductor. The second element layer is provided over the first element layer.