Silicon Oxide Polishing Composition for High-Rate, Low-Scratch CMP

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Solution Overview

Problem

Existing polishing compositions for semiconductor substrates, such as those described in JP-A-2016-56292, fail to adequately balance high polishing removal rates with reduced surface scratches, particularly for silicon oxide.

Innovation Solution

A polishing composition containing abrasive grains with an average primary particle size of 1 nm to 150 nm and an aggregation rate of 40% to 75%, along with a dispersing medium, which includes colloidal silica modified with organic acids to enhance zeta potential and controlled particle distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If polishing composition uses abrasive grains with higher removal rate, then polishing efficiency is improved, but surface scratches increase

Engineering Contradiction:

Improvepolishing removal rateVSAvoidsurface scratch reduction

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The abrasive grains are segmented into specific size ranges (0.1-10 μm for high removal rate, 1-10 μm for scratch control) and further divided by aggregation rate (30-70%) to create a hierarchical structure that balances cutting efficiency with surface quality

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the abrasive grain distribution are optimized for different functions: larger grains (0.1-10 μm) provide high removal rate in areas needing material elimination, while smaller aggregated grains (1-10 μm) provide scratch control in areas requiring surface quality

Inventive Principle:

Principle #3Local quality

2Productivity

If polishing composition increases abrasive grain size for higher removal rate, then polishing speed improves, but surface finish quality deteriorates

Engineering Contradiction:

Improvepolishing speedVSAvoidsurface finish quality

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The polishing composition uses a composite abrasive grain system combining grains of different sizes (0.1-10 μm and 1-10 μm) with controlled aggregation (30-70%), creating a multi-functional abrasive material that simultaneously provides high removal rate and excellent surface finish

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Improves polishing removal rates while significantly reducing surface scratches on silicon oxide, achieving stable and defect-free polishing results.

Implementation Method 1

CMP is a method of planarizing a surface of an object to be polished such as a semiconductor substrate using a polishing composition (slurry) containing abrasive grains such as silica, alumina, and ceria

Methodology Applied

Scientific EffectAbrasion: Abrasion

Implementation Method 2

colloidal silica modified with organic acids to enhance zeta potential and controlled particle distribution

Methodology Applied

Scientific EffectZeta potential: Electrostatics

Data Source

PatentUS20250282977A1Polishing composition, polishing method, and method for manufacturing semiconductor substrate

Publication Date: 2025.09.11 FUJIMI INCORPORATED

AI summary

The present disclosure is to provide means capable of improving a polishing removal rate of an object to be polished (particularly, silicon oxide) and reducing scratches on a surface of a polished object to be polished (particularly, silicon oxide). The present disclosure provides a polishing composition containing abrasive grains in which an average primary particle size is 1 nm or more and 150 nm or less, and a dispersing medium, in which an aggregation rate of the abrasive grains is 40% or more and less than 75%.