Silicon Oxynitride Memory Dielectric Erase Speed
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Solution Overview
Problem
Existing electrically programmable and erasable memory devices have slow erase speeds due to significant energy barriers in the dielectric layers, limiting operational efficiency.
Innovation Solution
Incorporating a silicon oxynitride layer between the silicon dioxide and silicon nitride layers in the memory device, which reduces the energy barriers for hole movement during the erase process by applying a specific voltage, allowing for faster erasure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a traditional dielectric structure with silicon dioxide and silicon nitride layers is used, then the device structure is simple and manufacturing is easier, but the erase speed is slow due to significant energy barriers
Solution Approach 1:
The dielectric layer is segmented into multiple sub-layers: a first dielectric layer (silicon dioxide), a second dielectric layer (silicon oxynitride), and a third dielectric layer (silicon nitride). This segmentation allows each layer to have optimized properties for different functions, with the silicon oxynitride layer specifically engineered to reduce energy barriers for hole movement, thereby improving erase speed without compromising overall device simplicity
Solution Approach 2:
The patent employs composite dielectric materials, specifically combining silicon dioxide, silicon oxynitride, and silicon nitride in a layered structure. The silicon oxynitride layer acts as an intermediate composite material that bridges the high-bandgap silicon dioxide and the lower-bandgap silicon nitride, creating a gradient structure that facilitates hole transport while maintaining electrical insulation, thus resolving the contradiction between simple structure and fast erase speed
2Speed
If higher voltage is applied to overcome energy barriers during erasing, then erase speed improves, but energy consumption and risk of damage increase
Solution Approach 1:
The patent changes the material composition parameter of the dielectric layer by introducing silicon oxynitride with intermediate bandgap properties between silicon dioxide and silicon nitride. This parameter change creates a more favorable energy landscape for hole movement, allowing the erase operation to proceed at lower voltages and reduced energy consumption while maintaining high erase speed
Solution Approach 2:
The silicon oxynitride layer serves as an intermediary medium between the silicon dioxide and silicon nitride layers. It mediates the energy barrier problem by providing a transition zone with intermediate electrical properties, enabling efficient hole transport from the control gate through the dielectric stack without requiring excessive voltage, thus reducing energy consumption while achieving fast erase speeds
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The inclusion of the silicon oxynitride layer significantly enhances erase speed by minimizing the energy barriers, resulting in a more efficient programming and erasing process compared to prior art devices.
Implementation Method 1
In the erasing of the device 49, a positive voltage is applied to the control gate 40A, while the substrate 30, source 46 and drain 48 are grounded. Applying a positive voltage pulse of sufficient magnitude to the control gate 40A causes holes in the gate 40A to travel through the dielectric 39 (which includes layers 36A, 38A) and into the storage layer 34A
Implementation Method 2
Incorporating a silicon oxynitride layer between the silicon dioxide and silicon nitride layers in the memory device, which reduces the energy barriers for hole movement during the erase process by applying a specific voltage
Implementation Method 3
In programming the device 49, as is well known, a positive voltage is applied to the drain 48, and the source 46 is grounded. Applying a positive voltage pulse of sufficient magnitude to the control gate 40A causes electrons to travel from the substrate 30 through the tunneling gate layer 32A and into the storage layer 34A
Data Source
AI summary
The present claimed subject matter is directed to memory device that includes substrate, a tunneling layer over the substrate, a floating gate over the tunneling layer, a dielectric over the floating gate and including silicon oxynitride, and a control gate over the dielectric.