Silicon Pattern Geometry for Threshold Voltage Uniformity
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving high integration and performance due to variations in threshold voltage and electrical characteristics, primarily attributed to non-uniform impurity distribution and steep side gradients in silicon patterns.
Innovation Solution
The semiconductor device incorporates a silicon substrate with an isolation region and active region, featuring a gate structure with spacers and silicon patterns that have highly doped impurity regions, where the silicon patterns are formed through selective epitaxial growth processes with controlled angles and pressures to achieve uniform impurity distribution and reduced threshold voltage variation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional planar transistor structures are used, then manufacturing is simpler, but threshold voltage variation and electrical characteristic uniformity deteriorate
Solution Approach 1:
The silicon substrate surface is divided into recessed portions and main surface portions, creating segmented regions that allow different doping concentrations and geometries. This segmentation enables precise control of threshold voltage by creating distinct zones for impurity distribution, thereby resolving the contradiction between manufacturing simplicity and threshold voltage uniformity.
Solution Approach 2:
Different regions of the silicon substrate are given different local properties: recessed portions receive specific doping treatments while main surface portions maintain different characteristics. The silicon patterns formed in recessed portions have localized high-quality impurity distribution, achieving uniform threshold voltage through spatially varying local quality rather than uniform global structure.
2Reliability
If impurity doping is increased to improve electrical characteristics, then conductivity improves, but impurity distribution uniformity deteriorates
Solution Approach 1:
The patent applies different impurity concentrations to different spatial locations: recessed portions receive doping treatments while main surface portions have different or no doping. This local quality approach allows high impurity concentrations in specific regions to improve conductivity without compromising overall distribution uniformity, as each region receives the appropriate local concentration for its function.
Solution Approach 2:
The patent transitions from two-dimensional planar doping to three-dimensional structured doping by forming recessed portions. This dimensional change allows impurity distribution to be controlled in vertical depth as well as horizontal position, enabling precise separation of high-concentration doping zones from low-concentration zones, thereby achieving both high reliability and uniform distribution.
3Reliability
If silicon patterns are formed with steep side gradients, then device performance improves, but leakage current paths increase
Solution Approach 1:
The patent converts the potentially harmful steep side gradients into beneficial structures by forming silicon patterns with controlled angles in recessed portions. The angled sides are designed to improve device performance while the specific geometry and doping treatment convert what would be leakage paths into controlled conduction regions, transforming the harmful effect into a beneficial performance enhancement.
Solution Approach 2:
The patent controls the side gradient angle as a critical parameter, specifying that sides are inclined at angles between 50-85 degrees relative to the substrate surface. This parameter optimization balances performance improvement from steep gradients while preventing excessive leakage. The angular parameter is carefully selected to achieve the desired trade-off between performance and leakage current suppression.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in superior electrical characteristics and reduced variation in threshold voltage, enhancing the performance and integration of semiconductor devices by ensuring uniform impurity projection ranges and minimizing leakage current paths.
Implementation Method 1
A first preliminary silicon pattern is formed and configured to fill insides of the recessed portions and configured to protrude the main surface portion to form sidewall facets through a first selective epitaxial growth process in which a first N type impurity having a first doping concentration is doped in-situ under a first pressure. Silicon patterns are formed by forming second preliminary silicon pattern on the first preliminary silicon patterns through a second selective epitaxial growth process in which a second N type impurity having a second impurity concentration lower than the impurity doping concentration is doped in-situ under a second pressure higher than the first pressure.
Data Source
AI summary
In a semiconductor device and a method of manufacturing the same, the semiconductor device includes a gate structure crossing an active region of a silicon substrate. Spacers are provided on both sides of the gate structure, respectively. Silicon patterns fill up recessed portions of the silicon substrate and on both sides of the spacers and has a shape protruding higher than a bottom surface of the gate structure, a lower edge of the protruded portion partially makes contact with a top surface of the isolation region, a first side and a second side of each of the silicon patterns, which are opposite to each other in a channel width direction in the gate structure, are inclined toward an inside of the active region. A highly doped impurity region is provided in the silicon patterns and doped with an N type impurity. The semiconductor device represents superior threshold voltage characteristics.