Silicon Patterning Stack for Tight-Pitch CD Uniformity
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Solution Overview
Problem
As semiconductor fabrication processes require smaller process windows, the decreasing pitch between elements and shrinking feature dimensions pose challenges in achieving high-quality pattern density and critical dimension uniformity using traditional optical masks and photolithography equipment.
Innovation Solution
The method involves a multi-layer patterning stack comprising a carbon-containing bottom layer, a silicon-containing middle layer, and a photosensitive top layer, which are deposited and patterned using advanced lithography techniques such as EUV lithography, to improve patterning metrics like line width roughness and local critical dimension uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional optical masks and photolithography equipment are used, then manufacturing process is simpler, but pattern density and critical dimension uniformity deteriorate at smaller pitch
Solution Approach 1:
The patterning process is divided into multiple sequential steps including depositing a first material layer, forming a first pattern, depositing a second material layer, and forming a second pattern. This multi-stage segmentation allows each step to be optimized independently, achieving high critical dimension uniformity at small pitch while managing overall process complexity through systematic breakdown of the fabrication sequence.
Solution Approach 2:
The invention transitions from planar single-layer patterning to multi-layer three-dimensional patterning structures. By stacking multiple material layers with alternating patterns, the system achieves enhanced pattern density and critical dimension control in the vertical dimension, effectively solving the limitations of traditional two-dimensional photolithography at scaled dimensions.
2Productivity
If pitch between elements is decreased, then functional density increases, but pattern quality and critical dimension uniformity worsen
Solution Approach 1:
Different material layers are assigned different local properties and functions. The first material layer and second material layer have distinct compositions and characteristics optimized for their specific patterning roles. This local quality differentiation allows each layer to contribute uniquely to overall pattern quality, maintaining low line width roughness even as pitch decreases and functional density increases.
Solution Approach 2:
The invention employs composite multi-layer structures combining different materials with complementary properties. The combination of first and second materials creates a composite patterning system where each material's properties are leveraged to overcome the limitations of single-material approaches, enabling high-quality patterns at reduced pitch while improving functional density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances pattern quality by improving line width roughness and local critical dimension uniformity, allowing for more aggressive dimension and pitch requirements in semiconductor devices, such as those in the back-end-of-the-line (BEOL) features.
Implementation Method 1
the silicon-containing layer is deposited by a deposition process comprising of precursors delivered toward a surface of the carbon-containing layer and chemically modifying the precursors to obtain the silicon-containing layer on the surface
Implementation Method 2
The photosensitive layer is patterned using a lithography process
Data Source
AI summary
In one exemplary aspect, the present disclosure is directed to a method for lithography patterning. The method includes providing a substrate and forming a target layer over the substrate. A patterning layer is formed by depositing a first layer having an organic composition; depositing a second layer including over 50 atomic percent of silicon; and depositing a photosensitive layer on the second layer. In some implementations, the second layer is deposited by ALD, CVD, or PVD processes.