Ultrathin Silicon Quantum Dot Intervalley Splitting

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Solution Overview

Problem

Silicon-based quantum information processing devices face limitations due to small intervalley splitting in silicon quantum dots, which hinders their performance at high and low temperatures, including room temperature and 4.2 K.

Innovation Solution

A silicon-based quantum information processing device is designed with a thin layer of silicon or silicon-germanium, no more than five monolayers thick, interposed between dielectric layers to increase intervalley splitting, achieving isolation of quantum dot states by enhancing the electric field and localization of electrons.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conventional silicon quantum dot is used, then the device structure is simple and fabrication is easy, but the intervalley splitting is small (less than 1 meV) which limits quantum state isolation

Engineering Contradiction:
Improvequantum state isolationVSAvoiddevice structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent changes the thickness parameter of the silicon layer from conventional dimensions to ultrathin (1-5 monolayers), which fundamentally alters the quantum confinement and increases intervalley splitting from less than 1 meV to over 100 meV. This parameter change resolves the contradiction by achieving better quantum state isolation through dimensional modification rather than structural complexity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent transitions from a bulk or thin-film silicon structure to an ultrathin two-dimensional confined structure (1-5 monolayers). This dimensional reduction creates strong quantum confinement in the vertical direction, which enhances the intervalley splitting and enables effective quantum state isolation without requiring complex device architectures

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the silicon layer thickness is increased to improve quantum dot formation, then the quantum dot states are better defined, but the intervalley splitting remains small and temperature performance deteriorates

Engineering Contradiction:
Improvetemperature performanceVSAvoidquantum state isolation
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent identifies thickness as the critical parameter controlling both quantum state definition and intervalley splitting. By optimizing the thickness to 1-5 monolayers, the patent simultaneously achieves strong quantum confinement for well-defined quantum dots and large intervalley splitting (>100 meV) for excellent temperature performance, resolving the apparent contradiction between these two requirements

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If rough silicon/silicon germanium interfaces are used to increase splitting to 1.5 meV, then the intervalley splitting increases, but the manufacturing complexity and interface control difficulty increase

Engineering Contradiction:
Improveintervalley splittingVSAvoidinterface control
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent replaces the need for interface roughness engineering with a thickness parameter approach. By controlling the silicon layer thickness to 1-5 monolayers, the patent achieves >100 meV intervalley splitting through quantum confinement effects alone, eliminating the need for complex interface roughness control and simplifying the manufacturing process while achieving superior results

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly increases intervalley splitting from less than 1 meV to over 100 meV, enabling improved performance and isolation of quantum dot states, particularly at high and low temperatures.

Implementation Method 1

The layer of silicon or silicon-germanium has a thickness of no more than five monolayers... by using a thin layer of silicon or silicon-germanium, intervalley splitting can be increased from less than 1 meV to well over 100 meV

Methodology Applied
Scientific EffectQuantum confinement:

Data Source

PatentEP3225587B1Silicon-based quantum dot device
Publication Date: 2021.07.28 HITACHI LTD
  • EP3225587B1 patent drawingFigure 1a~1b
  • EP3225587B1 patent drawingFigure 2
  • EP3225587B1 patent drawingFigure 3

AI summary

A silicon-based quantum dot device is (1) is disclosed. The device comprises a substrate (8) and a layer (7) of silicon or silicon-germanium supported on the substrate. The device is configured to provide at least one quantum dot (5_1 and 5_2) in the silicon or silicon-germanium layer (7). In order to increase the intervalley splitting in the quantum dots the layer of silicon or silicon-germanium has a thickness of no more than ten monolayers. The layer of silicon or silicon-germanium may have a thickness of no more than eigth or five monolayers. The device further comprises laterally placed gates (8), as well as two single-electron tranistsors (3) at respective sides of the quantum dots.