Silicon-Rich Nitride Memory Cell Erase Speed
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Solution Overview
Problem
Multi-level storage (MLS) architecture in Flash memory cells requires precise charge control, leading to slower programming, unreliable data, and reduced speed and reliability due to the need for precise charge differentiation, which complicates error correction and access times.
Innovation Solution
A memory cell system utilizing a substrate with a charge-storing stack formed by silicon-rich nitride and a gate structure, improving erase functionality through Fowler-Nordheim tunneling by three or more orders of magnitude, enabling efficient storage and retrieval of multiple bits without sacrificing speed or reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level storage architecture is used to increase memory density, then storage capacity is improved, but programming speed and data reliability deteriorate due to precision requirements
Solution Approach 1:
The patent divides the charge storage function into separate components: a first charge trapping layer for storing charge and a second charge trapping layer for reading charge. This segmentation allows each layer to be optimized for its specific function, enabling parallel operations that improve programming speed while maintaining multi-level storage density.
Solution Approach 2:
The patent introduces a tunnel insulator layer as an intermediary between the charge trapping layers and the substrate/gate structures. This intermediary enables controlled charge injection and extraction through Fowler-Nordheim tunneling, allowing fast programming and erasing operations without compromising the precision needed for multi-level storage reliability.
2Quantity of substance
If multi-level storage architecture is used to increase memory density, then storage capacity is improved, but access time increases due to precise charge differentiation requirements
Solution Approach 1:
By separating charge storage and charge reading functions into different layers, the patent enables independent optimization. The first charge trapping layer can be quickly programmed while the second layer provides reliable charge detection, reducing overall access time while maintaining high density through multi-level storage.
Solution Approach 2:
The patent utilizes Fowler-Nordheim tunneling to change the electrical parameters of the charge trapping layers, enabling rapid charge injection and extraction. This parameter change mechanism allows fast programming and reading operations, reducing access time while maintaining the precision required for multi-level storage differentiation.
3Quantity of substance
If multi-level storage architecture is used to increase memory density, then storage capacity is improved, but reliability deteriorates due to error correction complexity
Solution Approach 1:
The patent segments the charge trapping functionality into two distinct layers, where the first layer handles charge storage and the second layer handles charge reading. This separation simplifies error detection and correction by providing dedicated layers for each function, improving data reliability while maintaining multi-level storage density.
Solution Approach 2:
The tunnel insulator layer acts as an intermediary that enables controlled and reliable charge transfer through Fowler-Nordheim tunneling. This intermediary mechanism ensures precise charge injection and extraction, reducing programming errors and improving overall data reliability in multi-level storage operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The silicon-rich nitride-based memory cell system enhances erase performance, supports multiple bit storage, improves manufacturability, and provides higher density and faster access compared to traditional MLS architectures, addressing the limitations of precision and speed in existing technologies.
Implementation Method 1
improving erase functionality through Fowler-Nordheim tunneling
Data Source
AI summary
A memory cell system including providing a substrate, forming a charge-storing stack having silicon-rich nitride on the substrate, and forming a gate on the charge-storing stack.