Silicon Ring Plasma Confinement for Wafer Edge Uniformity
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Solution Overview
Problem
Plasma-enhanced chemical vapor deposition (PECVD) systems face challenges in achieving uniform film thickness across semiconductor wafers, particularly at the wafer edge, due to existing plasma confinement techniques that do not effectively extend beyond the wafer edge, leading to non-uniformity.
Innovation Solution
A process chamber design incorporating a silicon ring made of similar material to the semiconductor wafer, positioned around the wafer to extend the deposition surface beyond the wafer edge, with a confinement ring and showerhead configuration to confine plasma at the silicon ring's outer edge, shifting non-uniformity effects away from the wafer edge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If plasma confinement is positioned at the wafer edge, then plasma is effectively confined, but film thickness uniformity at the wafer edge deteriorates due to interactions with the electrode and chamber parts
Solution Approach 1:
The invention extracts the plasma confinement function from the wafer edge region and relocates it to the silicon ring's outer edge. By separating the confinement location from the wafer edge, the harmful interactions between plasma and wafer-edge components (electrode, chamber parts) are eliminated, improving film thickness uniformity while maintaining confinement effectiveness
2Manufacturing precision
If the deposition surface is extended beyond the wafer edge using a silicon ring, then film thickness uniformity at the wafer edge is improved, but device complexity increases
Solution Approach 1:
The silicon ring is constructed from material with electrical properties similar to the semiconductor wafer, creating a homogeneous extension of the deposition surface. This material homogeneity allows the plasma to treat the silicon ring as a continuation of the wafer surface, enabling effective plasma confinement at the ring's outer edge without introducing significant device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves substantially uniform film thickness at the wafer edge, comparable to the center, by extending the deposition surface and minimizing plasma disruption, thereby improving wafer yield and uniformity.
Implementation Method 1
Plasma-enhanced chemical vapor deposition (PECVD) is a type of plasma deposition that is used to deposit thin films of deposition chemistry on a substrate, such as a semiconductor wafer
Implementation Method 2
A confinement ring may be disposed over the pedestal to surround the silicon ring. The confinement ring, when present, is used to confine a plasma at an outer edge of the silicon ring
Data Source
AI summary
A chamber for use in implementing a deposition process includes a pedestal for supporting a semiconductor wafer. A silicon ring is disposed over the pedestal and surrounds the semiconductor wafer. The silicon ring has a ring thickness that approximates a semiconductor wafer thickness. The silicon ring has an annular width that extends a process zone defined over the semiconductor wafer to an extended process zone that is defined over the semiconductor wafer and the silicon ring. A confinement ring defined from a dielectric material is disposed over the pedestal and surrounds the silicon ring. A showerhead having a central showerhead area and an extended showerhead area is also included. The central showerhead area is substantially disposed over the semiconductor wafer and the silicon ring. The extended showerhead area is substantially disposed over the confinement ring. The annular width of the silicon ring enlarges a surface area of the semiconductor wafer that is exposed and shifts non-uniformity effects of deposition materials over the semiconductor wafer from an edge of the semiconductor wafer to an outer edge of the silicon ring.


