Silicon Step Quantum Dots for Scalable 2D Arrays

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Solution Overview

Problem

Existing silicon nanowire quantum dot architectures are limiting and not scalable for quantum computing, particularly in creating a dense two-dimensional array of quantum dots with effective control and resilience to charge errors.

Innovation Solution

A silicon-based quantum device with a substrate featuring a step and offset planar regions, using metallic layers to induce confinement regions perpendicular to the edge, allowing for tunable coupling and decoupling of quantum dots, and employing a silicon-on-insulator substrate for reliable etching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a one-dimensional array of quantum dots is created along the SiNW, then quantum confinement is achieved, but the architecture is very limiting and not scalable

Engineering Contradiction:
Improvescalability of quantum dot architectureVSAvoidlimitation of one-dimensional array architecture
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent transitions from a one-dimensional array of quantum dots along a silicon nanowire to a two-dimensional array by creating multiple quantum dots at the corner of a step in the silicon layer. The step structure provides confinement in two dimensions (along the edge and perpendicular to it), while a gate provides confinement in the third dimension, enabling scalable 2D quantum dot arrays for quantum computing

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple quantum dots are positioned along the SiNW, then quantum computation capability is provided, but charge stability and resilience to charge errors are insufficient

Engineering Contradiction:
Improvecharge stability and resilience to charge errorsVSAvoidquantum computational capability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent positions quantum dots at the corner of a step in the silicon layer, where the corner geometry provides enhanced confinement and stability. The step structure creates a localized region with improved charge stability, and the quantum dots can be coupled through mediators to enable quantum computation while maintaining resilience to charge errors

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If a dense two-dimensional array of quantum dots is created, then scalability is improved, but manufacturing precision and control become more difficult

Engineering Contradiction:
Improvedense two-dimensional array architectureVSAvoidcontrol of quantum dot positioning and coupling
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent creates a step in the silicon layer before forming the quantum dots, using the step structure to pre-establish the positions where quantum dots will form. This preliminary structuring enables precise positioning of multiple quantum dots in a two-dimensional array, facilitating scalable manufacturing with improved control over quantum dot placement and coupling

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables a scalable, dense two-dimensional architecture with improved charge stability and control over quantum dots, reducing manufacturing steps and enhancing resilience to charge errors.

Implementation Method 1

A qubit can be based on a quantum dot, which is a quantum confinement structure in which a charge carrier such as an electron or a hole can be electrostatically confined in three dimensions

Methodology Applied
Scientific EffectElectrostatic confinement: Electrostatics

Data Source

PatentUS12453138B2Quantum dot device
Publication Date: 2025.10.21 QUANTUM MOTION TECH LTD
  • US12453138B2 patent drawing
  • US12453138B2 patent drawing
  • US12453138B2 patent drawing

AI summary

A silicon-based quantum device for confining charge carriers is provided. The device comprises: a substrate having a first planar region 137; a silicon layer 32 which forms part of the substrate and includes a step 33 with an edge 34 and a second planar region 135, wherein the second planar region 135 is substantially parallel to and offset from the first planar region 137; a first electrically insulating layer 42 provided on the silicon layer 32, overlying the step 33; a first metallic layer 51, provided on the first electrically insulating layer 42, overlying the step 33, arranged to be electrically connected such that a first confinement region 10 can be induced in which a charge carrier or charge carriers can be confined at the edge 34; and a second metallic layer 52, provided overlying the second planar region 135 of the silicon layer, wherein the second metallic layer is: electrically separated from the first metallic layer 51; and arranged to be electrically connected such that a second confinement region 11 can be induced in which a charge carrier or charge carriers can be confined only in the second planar region 135 of the silicon layer 32 under the second metallic layer 52, and the first confinement region 10 is couplable to the second confinement region 11; wherein the first confinement region 10 is displaced from the second confinement region 11 in a direction that is perpendicular to the edge 34. A method of assembling a silicon-based quantum device and a method of using a silicon-based quantum device are also provided.