Silicon Substrate End-Region Thinning for Solar Cell Reliability
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Solution Overview
Problem
Solar cells with single crystal silicon substrates face reduced performance due to damage from cutting tools, leading to increased generation-recombination centers at the end surfaces, which decrease open-circuit voltage and carrier lifetime.
Innovation Solution
A photoelectric conversion element with a silicon substrate having a thinner end-portion region and smaller average surface roughness compared to the central region, combined with amorphous semiconductor layers and an antireflection coat, to reduce thermal strain and improve carrier lifetime and open-circuit voltage uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a dicer or laser beam cutter is used to cut the silicon substrate, then the substrate can be divided into desired shapes and sizes, but heat or stress from the cutting tool causes damage to the end surface and forms generation-recombination centers
Solution Approach 1:
The patent applies preliminary action by performing chemical etching to remove damaged portions from the end surfaces before the substrates are assembled into modules. This pre-treatment eliminates generation-recombination centers that would otherwise form during the cutting process, thereby preserving carrier lifetime and electrical performance without changing the cutting method itself.
Solution Approach 2:
The patent extracts the damaged portions from the end surfaces through chemical etching. By selectively removing the damaged outer layer containing generation-recombination centers, the healthy inner material is exposed, thus separating the harmful damaged portion from the useful functional material.
2Productivity
If cutting tools are used to process the substrate, then manufacturing can proceed, but electrical leakage occurs at the pn junction due to damage and generation-recombination centers
Solution Approach 1:
The patent converts the harmful effect of cutting-induced damage into a beneficial process by using chemical etching to selectively remove the damaged portions. The same cutting process that creates damage also creates accessible end surfaces that can be treated, transforming a manufacturing drawback into an opportunity for quality improvement.
Solution Approach 2:
By performing chemical etching on the end surfaces before module assembly, the patent eliminates electrical leakage paths in advance. This preliminary treatment ensures that when the substrates are later assembled and wired, the electrical performance is already optimized without requiring post-assembly corrections.
3Ease of manufacture
If the end surface has coarse shape due to damage, then cutting can be performed, but carrier lifetime is significantly reduced due to increased dangling bonds
Solution Approach 1:
The patent transforms the coarse, damaged end surface created by cutting into a benefit by using chemical etching to selectively remove the damaged outer layer. This process eliminates dangling bonds and generation-recombination centers, converting the initially harmful coarse surface into a clean, low-defect surface that enhances carrier lifetime.
Solution Approach 2:
The patent replaces mechanical cutting methods that create damage with a chemical etching process to remove the damage. By substituting the mechanical removal approach with a chemical dissolution approach, the process selectively eliminates damaged material without creating additional mechanical stress or damage.
4Productivity
If many generation-recombination centers exist on the end surface, then cutting can be completed, but open-circuit voltage is reduced due to parallel circuit characteristics of minute cells
Solution Approach 1:
The patent extracts generation-recombination centers from the end surfaces through chemical etching. By removing the damaged outer layer containing these defect centers, the patent eliminates the parallel circuit leakage paths that would otherwise reduce the overall open-circuit voltage of the module, thereby improving voltage uniformity across the substrate.
Solution Approach 2:
By performing chemical etching to remove generation-recombination centers before module assembly and electrical testing, the patent ensures that open-circuit voltage measurements and performance evaluations reflect the true potential of the solar cells without being degraded by end-surface defects. This preliminary cleanup prevents voltage uniformity issues from manifesting in the final product.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the in-plane characteristics of open-circuit voltage and conversion efficiency by minimizing damage and strain, resulting in improved solar cell performance.
Implementation Method 1
a front surface of the silicon substrate having the (100) plane is subjected to anisotropic etching, and thus a pyramid-like uneven shape is formed by the (111) surface
Implementation Method 2
an antireflection coat, and electrodes, wherein the light-receiving surface is covered with the amorphous semiconductor layer and the antireflection coat
Implementation Method 3
a solar cell using a single crystal silicon substrate
Data Source
AI summary
There is provided a photoelectric conversion element which includes an n-type single crystal silicon substrate (1). The n-type single crystal silicon substrate (1) includes a central region (11) and an end-portion region (12). The central region (11) is a region which has the same central point as the central point of the n-type single crystal silicon substrate (1) and is surrounded by a circle. The diameter of the circle is set to be a length which is 40% of a length of the shortest side among four sides of the n-type single crystal silicon substrate (1). The central region (11) has a thickness t1. The end-portion region (12) is a region of being within 5 mm from an edge of the n-type single crystal silicon substrate (1). The end-portion region (12) is disposed on an outside of the central region (11) in an in-plane direction of the n-type single crystal silicon substrate (1), and has a thickness t2 which is thinner than the thickness t1. The end-portion region (12) has average surface roughness which is smaller than average surface roughness of the central region (11).