Silicon Trench Capacitor Integration via Through Silicon Interposer
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Solution Overview
Problem
Decoupling capacitors in electronic circuits face challenges due to their large size, which increases equivalent series resistance (ESR) and equivalent series inductance (ESL), necessitating thicker capacitors that are thicker than integrated circuit chips, leading to increased connection lengths and capacitance requirements.
Innovation Solution
Integration of silicon-based trench capacitors with integrated circuit chips and packages using through silicon interposers (TSIs) for silicon-level connections, which reduces connection lengths and parasitics, allowing for thinner capacitors with high aspect ratio trenches and thin dielectric layers to increase capacitance per unit area and volume.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete decoupling capacitors are used, then capacitance function is provided, but connection length increases and parasitics increase
Solution Approach 1:
The patent merges the decoupling capacitor with the integrated circuit chip by fabricating the capacitor directly on the chip substrate. The capacitor shares the same substrate and packaging as the IC chip, eliminating separate discrete capacitor components and their associated lead connections. This integration directly reduces connection length and parasitic elements while maintaining the decoupling function.
2Reliability
If capacitor thickness is increased, then capacitance magnitude increases, but device thickness increases beyond chip thickness
Solution Approach 1:
The patent transitions from planar capacitor structures to three-dimensional vertical trench structures. High-aspect-ratio trenches extend vertically through the substrate, providing large capacitance per unit area. The capacitor electrodes are formed as vertical walls within these trenches, creating large surface area for charge storage without increasing the horizontal footprint or requiring excessive thickness, thus achieving high capacitance within chip-thickness constraints.
3Object-generated harmful factors
If connection length is reduced, then parasitics are reduced, but integration complexity increases
Solution Approach 1:
The patent segments the capacitor structure into distinct vertical layers and regions within the substrate: top electrode, first dielectric layer, trench structure, second dielectric layer, and bottom electrode. Each layer serves a specific function and can be fabricated using standard semiconductor processing steps. This segmentation allows the complex three-dimensional structure to be built systematically through sequential deposition and etching processes, making the integration manageable despite the increased structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the effective ESR and ESL, decreases the required capacitance magnitude, and enables thinner capacitors that match the chip thickness, improving integration and reducing thermal mismatch between silicon components.
Implementation Method 1
Decoupling capacitors are often relatively large capacitors necessary to decouple one circuit (e.g., a power supply) from another circuit
Data Source
AI summary
Methods and apparatuses are described for integration of integrated circuit die and silicon-based trench capacitors using silicon-level connections to reduce connection lengths, parasitics and necessary capacitance magnitudes and volumes. A trench capacitor can be fabricated on silicon and mounted on or embedded in a chip or one or more sides of a through silicon interposer (TSI) for silicon-level connections to chip circuitry. Aspect ratio dependent, as opposed to trench diameter or trench depth dependent, trench capacitors formed by a dense array of high aspect ratio trenches with thin, high permittivity dielectric increase capacitance per unit area and volume, resulting in thin, high capacitance trench capacitors having thickness equal to or less than chip thickness.