Silicon Wafer BMD Distribution for Slip Dislocation Control
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Solution Overview
Problem
Silicon wafers used in semiconductor devices face challenges with slip dislocations and warpage, particularly in large diameter wafers, due to the propagation of dislocation defects during heat treatment, which can lead to wafer damage and reduced device yield.
Innovation Solution
A silicon wafer with a specific BMD size distribution of 20 nm to 40 nm at a density of 5×10^11/cm^3 to 5×10^13/cm^3 in the bulk portion, separated from the surface by 20 μm or more, and a density of BMDs with sizes ≥300 nm of ≤1×10^7/cm^3, along with nitrogen or hydrogen doping, is developed to suppress slip dislocations and warpage. The manufacturing method involves controlled cooling rates, heat treatment temperatures, and atmospheres to maintain the BMD distribution and prevent dislocation propagation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-temperature annealing is performed to form BMDs and DZ layer, then crystal defects are reduced and gettering ability is improved, but oxygen out-diffusion reduces dislocation restraint and slip dislocations propagate
Solution Approach 1:
The patent applies parameter changes by precisely controlling heat treatment temperature ranges (first heat treatment at 400-850°C, second heat treatment at 1100-1250°C), time durations (1-600 minutes), and atmospheric conditions (nitrogen or ammonia mixed gas with inert gas) to achieve optimal BMD formation while preventing excessive oxygen out-diffusion that would cause slip dislocation propagation
Solution Approach 2:
The patent applies preliminary action by performing a first heat treatment before the second heat treatment to pre-form BMDs with controlled size distribution (20-40 nm diameter). This preliminary BMD formation creates a foundation that restrains slip dislocation propagation during the subsequent high-temperature annealing process
2Quantity of substance
If rapid heating and cooling rates are used to generate high density BMDs, then BMD concentration is improved, but warpage occurs in large diameter wafers
Solution Approach 1:
The patent applies parameter changes by optimizing the balance between heating/cooling rates and hold time at treatment temperature. Instead of solely relying on rapid rates, the method controls the combination of moderate heating rate, extended hold time (1-600 minutes), and controlled cooling to achieve high BMD concentration (1×10^10 to 1×10^12 atoms/cm³) while minimizing thermal stress-induced warpage in large diameter wafers
3Manufacturing precision
If DZ layer is formed to eliminate grown-in defects, then device forming region quality is improved, but oxygen concentration reduction facilitates slip dislocation extension
Solution Approach 1:
The patent applies local quality by creating different oxygen concentration zones within the wafer: a DZ layer with reduced oxygen concentration at the surface (5 μm or more thickness) to eliminate grown-in defects and ensure device forming region quality, while maintaining sufficient oxygen concentration in the bulk to restrain slip dislocation propagation. The BMD size distribution (20-40 nm) is specifically controlled to achieve this spatial differentiation of oxygen roles
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively limits slip dislocation lengths to ≤10 mm and warpage to ≤20 μm, ensuring the silicon wafers' strength and gettering ability, while preventing dislocation-induced warpage and maintaining semiconductor device quality.
Implementation Method 1
Oxygen dissolves in the CZ-Si lattice (interstitial oxygen) in a supersaturated state, and the supersaturated oxygen, through oxygen precipitation, produces fine defects called 'BMDs' (Bulk Micro Defects) in subsequent heat treatments (anneals) conducted.
Implementation Method 2
oxygen concentrations in the DZ layers formed on the front surface and a back surface of the silicon wafer in the high-temperature annealing process are extremely reduced due to out-diffusion of oxygen during heat treatment
Implementation Method 3
The Czochralksi method (CZ) is one manufacturing method for producing such silicon single crystal ingots
Implementation Method 4
silicon wafers are subjected to a high-temperature anneal to induce BMDs in the silicon wafer to form an IG (intrinsic gettering) layer, and also to diminish grown-in defects present in the surface of the silicon wafer
Data Source
AI summary
Silicon wafers having a density of BMDs with sizes between 20 to 40 nm at positions ≧20 μm below the wafer surface in the range of 5×1011/cm3, and a density of BMDs with sizes of ≧300 nm≦1×107/cm3, exhibit reduced slip dislocation and warpage. The wafers are sliced from a crystal grown under specific conditions and then subjected to both low temperature heat-treatment and high temperature anneal.