Silicon Wafer Getterability via Vacancy Agglomerates
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Solution Overview
Problem
Silicon wafers produced by the Czochralski method often contain defects like crystal lattice vacancies and interstitials, which lead to issues such as short circuits, deformation, and reduced component yields due to the formation of oxygen precipitates and dislocation loops, making it challenging to achieve a balance between bulk micro-defect density and surface quality.
Innovation Solution
A silicon wafer with a region comprising agglomerates of crystal lattice vacancies in a specific density and size distribution, combined with a BMD-free layer on the surface, is produced using controlled heat treatment and oxygen concentration to achieve optimal getterability and minimize defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the Czochralski method is used to produce silicon single crystals, then silicon wafers can be manufactured efficiently, but defects such as crystal lattice vacancies and interstitials are incorporated into the crystal structure
Solution Approach 1:
The patent applies preliminary action by performing a specific heat treatment process on the silicon wafers after manufacturing to eliminate defects. The heat treatment at controlled temperatures and atmospheres removes crystal lattice vacancies and interstitials before the wafers are used for device fabrication, thus preventing defects from affecting device reliability while maintaining manufacturing efficiency
Solution Approach 2:
The patent utilizes parameter changes by carefully controlling heat treatment parameters including temperature (900-1100°C), atmosphere (oxygen partial pressure), and time to transform the crystal structure. By adjusting these parameters, the patent achieves optimal defect elimination while preserving the desired electrical properties of the silicon wafers
2Reliability
If oxygen concentration is increased to enhance getterability, then metal impurities can be effectively trapped, but oxygen precipitates and OSF seeds form which cause short circuits and deformation
Solution Approach 1:
The patent applies parameter changes by precisely controlling the oxygen concentration in the heat treatment atmosphere and the thermal profile. By optimizing these parameters, the patent achieves sufficient oxygen precipitation for getterability while preventing excessive precipitation that would form harmful OSF seeds and large oxygen precipitates causing short circuits and deformation
Solution Approach 2:
The patent applies local quality by creating different oxygen precipitation conditions in different regions of the silicon wafer. The heat treatment process promotes controlled oxygen precipitation in the bulk to provide gettering, while maintaining a BMD-free layer at the surface to prevent short circuits, thus achieving different quality characteristics in different locations
3Reliability
If heat treatment is performed to eliminate crystal defects, then COPs can be broken down, but process times of more than 30 minutes at 1200°C are required which increases manufacturing complexity
Solution Approach 1:
The patent applies parameter changes by optimizing the heat treatment temperature, oxygen partial pressure, and duration to achieve effective defect elimination with reduced process complexity. By carefully selecting parameters such as temperature (900-1100°C) and atmosphere composition, the patent achieves COP breakdown and defect removal with simpler, more controllable processes compared to conventional high-temperature long-duration treatments
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a silicon wafer with a high and homogeneous BMD density for effective getterability, reduced OSF seeds, and a deep BMD-free layer, enhancing the production of electronic components by preventing short circuits and deformation, while maintaining sufficient oxygen precipitation in the bulk.
Implementation Method 1
oxygen precipitates bind metal impurities which diffuse into the silicon wafer during the production of electronic components. This effect is referred to as the 'intrinsic getter effect'
Implementation Method 2
metals are preferentially bound to OSFs ('gettered'), which leads to degradation of the gate oxide
Implementation Method 3
G=thermal gradient at the interface between the melt and the growing single crystal
Implementation Method 4
subjected to a multiplicity of processing steps in order to obtain the desired surface quality
Data Source
AI summary
Silicon wafers in the entire volume of which crystal lattice vacancies are the prevalent point defect type, have a rotationally symmetric region whose width is at least 80% of the wafer radius, crystal lattice vacancy agglomerates of at least 30 nm in a density ≦6·103 cm−3, crystal lattice vacancy agglomerates of from 10 nm to 30 nm in a density of 1·105 cm−3 to 3·107 cm−3, OSF seeds in a density of 0 to 10 cm−2, and an average bulk BMD density of 5·108 cm−3 to 5·109 cm−3, which varies at most by a factor of 10 radially over the entire silicon wafer, and a BMD-free layer on the front side, wherein the first BMD is found at a depth of at least 5 μm and on average at a depth of at least 8 μm.