Silicon Wafer Gettering Without Slip Dislocations
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Solution Overview
Problem
Silicon wafers used in semiconductor device manufacturing face issues with slip dislocations and leak defects due to rapid temperature changes, which degrade device yield, especially when subjected to heat treatment at maximum temperatures of 1100°C or more with a temperature increase rate of 300°C/sec or more after mirror machining.
Innovation Solution
A silicon wafer is treated to form a layer with zero light scattering defects at a depth of 25 µm or more but less than 100 µm and a light scattering defect density of 1 x 10^8/cm^3 or more at 100 µm depth, preventing slip dislocations and achieving a gettering effect during rapid-temperature-increase/decrease heat treatment processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If rapid temperature increase heat treatment is conducted at maximum temperature of 1100°C or more and rate of temperature increase of 300°C/sec or more, then device manufacturing efficiency is improved, but slip dislocations occur from oxygen precipitates and penetrate the surface layer
Solution Approach 1:
The patent applies preliminary action by conducting heat treatment at 800-1000°C before the rapid temperature increase process to form oxygen precipitates in advance. This pre-formed precipitate structure prevents slip dislocations during subsequent rapid heating at 1100°C or higher, as the oxygen precipitates are already positioned to block dislocation propagation paths to the surface layer
Solution Approach 2:
The patent utilizes parameter changes by controlling the temperature profile through two distinct stages: first heating to 800-1000°C to induce oxygen precipitation, then rapidly increasing to 1100°C or higher for device processing. This parameter sequencing transforms the thermal history to achieve both high productivity and wafer integrity
2Reliability
If heat treatment is conducted to achieve gettering effect, then device yield is improved, but punch-out dislocations and leak defects occur due to high stress
Solution Approach 1:
The patent applies preliminary action by performing the first heat treatment at 800-1000°C before rapid temperature increase to pre-position oxygen precipitates. This preliminary precipitate formation creates a defect structure that prevents punch-out dislocations during subsequent gettering processes, eliminating leak defects while maintaining high device yield
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents slip dislocations and achieves a gettering effect, ensuring the silicon wafer's integrity and device yield even under extreme heat treatment conditions, as demonstrated by the absence of punch-out dislocations and reduced etching pits.
Implementation Method 1
it has been found that slip dislocations may occur from the oxygen precipitate existing in the vicinity of surface layer of the wafer
Implementation Method 2
achieves a gettering effect without occurrence of slip dislocations even when heat treatment is conducted at a maximum temperature of 1100°C or more
Implementation Method 3
furnaces exhibiting rapid temperature increases and decreases have come into frequent use in device manufacturing processes
Implementation Method 4
a large temperature disparity occurs between the front face and rear face of the wafer
Data Source
Figure 1~2
Figure 3~4
AI summary
A silicon wafer which achieves a gettering effect without occurrence of slip dislocations is provided, and the silicon wafer is subject to heat treatment after slicing from a silicon monocrystal ingot so that a layer which has zero light scattering defects according to the 90° light scattering method is formed in a region at a depth from the wafer surface of 25 µm or more but less than 100 µm, and a layer which has a light scattering defect density of 1 x 108/cm3 or more according to the 90° light scattering method is formed in a region at a depth of 100 µm from the wafer surface.