Silicon Wafer Defect Control via Temperature Gradient and Hydrogen Doping

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in manufacturing silicon single crystals for semiconductor wafers is the presence of Grown-in defects, such as vacancy defects and dislocation clusters, which affect the performance and yield of integrated circuits, particularly with the miniaturization of circuits requiring defect-free areas over the entire wafer surface.

Innovation Solution

A method involving the Czochralski process with a hot zone structure where the temperature gradient is larger in the center than the periphery, combined with controlled hydrogen partial pressure and doping of nitrogen or carbon, to extend the defect-free area and uniformly form Bulk Micro-Defects (BMD) across the wafer surface, thereby reducing Grown-in defects and improving wafer quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the pull-up speed is increased to improve productivity, then the manufacturing efficiency is improved, but Grown-in defects such as IR scatterer and dislocation cluster increase

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoiddefect-free area
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by precisely controlling the pull-up speed within a specific range (0.2-0.6 mm/min) and maintaining the temperature gradient (G/V ratio) between 2.0-4.0 °C/(mm/min) to minimize Grown-in defects while ensuring sufficient productivity. This optimization of process parameters resolves the contradiction between manufacturing efficiency and defect reduction.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the defect-free area is extended to the entire wafer surface for miniaturized circuits, then the device performance is improved, but the manufacturing complexity increases

Engineering Contradiction:
Improvedevice performanceVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a uniform temperature distribution across the entire crystal growth cross-section, ensuring that the entire wafer surface achieves defect-free quality suitable for miniaturized circuits. This is accomplished through optimized heater configuration and heat insulation structures that maintain consistent thermal conditions throughout the growth zone.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If thermal treatment is applied to remove Grown-in defects, then the defect-free area is improved, but the treatment time and energy consumption increase

Engineering Contradiction:
Improvedefect-free areaVSAvoidtreatment time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by preventing Grown-in defect formation during the crystal growth process itself through optimized temperature control and pull-up speed management. By addressing the defect prevention proactively during growth rather than requiring extensive post-growth thermal treatment, the method reduces treatment time and energy consumption while achieving defect-free wafers.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the production of silicon wafers with significantly reduced Grown-in defects, enhancing the yield and performance of integrated circuits by ensuring a defect-free area over the entire wafer surface, which is crucial for further miniaturization and higher density of circuits.

Implementation Method 1

growing a silicon single crystal by immersing and pulling up seed crystal in and from molten silicon within a quartz crucible

Methodology Applied
Scientific EffectMelting: Melting

Implementation Method 2

growing a single crystal by immersing and pulling up seed crystal in and from molten silicon

Methodology Applied
Scientific EffectCrystallisation: Crystallisation

Implementation Method 3

a hot zone structure where the temperature gradient is larger in the center than the periphery

Methodology Applied
Scientific EffectTemperature Gradient: Temperature Gradient

Implementation Method 4

adding a gas made of a hydrogen atom-containing substance to an atmosphere gas within a growing apparatus

Methodology Applied
Scientific EffectAbsorption: Absorption (physical)

Implementation Method 5

doping nitrogen and/or carbon in the crystal

Methodology Applied
Scientific EffectDoping: Dopants

Data Source

PatentUS7435294B2Method for manufacturing silicon single crystal, and silicon wafer
Publication Date: 2008.10.14 SUMCO CORP
  • US7435294B2 patent drawing
  • US7435294B2 patent drawing
  • US7435294B2 patent drawing

AI summary

A silicon single crystal is manufactured by growing said crystal composed of a defect-free area free from the Grown-in defects by the CZ process, adding a gas of a hydrogen atom-containing substance to an atmosphere gas within a growing apparatus, and doping nitrogen and/or carbon in the crystal. Therefore, a wafer the whole surface of which is composed of the defect-free area free from the Grown-in defects and which can sufficiently and uniformly form BMD can be easily sliced. Such a wafer can be extensively used, since it can significantly reduce generation of characteristic defectives of integrated circuits to be formed thereon and contribute for improving the production yield as a substrate responding to the demand for further miniaturization and higher density of the circuits.