Silicon Wafer Oxide Thickness Control to Prevent Epitaxial Stacking Faults
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Solution Overview
Problem
Existing methods for manufacturing semiconductor silicon wafers with low resistivity struggle to inhibit the formation of stacking faults (SF) in the epitaxial layer, particularly due to phosphorus-aggregation defects (Si—P defects).
Innovation Solution
A manufacturing method that involves forming a silicon oxide film with a specific thickness on the backside of the silicon wafer substrate, followed by mirror polishing and heat treatment under controlled conditions. The heat treatment includes maintaining the substrate at a temperature between 700°C and 850°C for a specific duration, and then raising the temperature to between 1100°C and 1250°C for further processing. This method optimizes the processes of heat treatment, epitaxial layer growth, and substrate preparation to inhibit the formation of Si—P defects and subsequent SF in the epitaxial layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the dopant concentration is increased to reduce substrate resistivity, then the resistivity decreases, but stacking faults are generated in the epitaxial layer
Solution Approach 1:
The method performs preliminary actions before epitaxial growth: forming a silicon oxide film on the back surface, selectively removing it from the outer circumference, and conducting argon annealing to precipitate phosphorus clusters. These preliminary steps prepare the substrate by creating controlled micro-pits and redistributing phosphorus, preventing stacking faults during subsequent epitaxial growth while maintaining low resistivity
Solution Approach 2:
The patent introduces intermediate substances and processes: silicon oxide film as a mediator to control phosphorus distribution, argon gas as an intermediary atmosphere for annealing, and hydrogen gas for selective etching. These intermediaries enable the system to achieve low resistivity without direct phosphorus contact that would cause stacking faults
2Ease of manufacture
If heat treatment is performed to remove oxide layers and etch phosphorus clusters, then the oxide is removed and clusters are etched, but stacking faults still occur in the epitaxial layer
Solution Approach 1:
The method applies local quality by selectively removing the oxide film only from the outer circumference while maintaining it in the center, and by controlling argon annealing to precipitate phosphorus clusters in specific regions. This localized treatment creates micro-pits only where needed, preventing stacking faults without affecting the overall substrate structure
Solution Approach 2:
The patent changes multiple parameters: argon annealing temperature (1200-1220°C), hydrogen baking temperature (105-1200°C), and gas flow rates. By optimizing these parameters, the method achieves selective phosphorus cluster etching and micro-pit formation that prevents stacking faults during epitaxial growth
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively inhibits the formation of stacking faults in the epitaxial layer by reducing phosphorus-aggregation defects, while also suppressing the out-diffusion of phosphorus and variations in resistivity, thereby improving the quality and reliability of the semiconductor silicon wafers.
Implementation Method 1
a heat treatment step of heat-treating the mounted substrate at a constant temperature of 700° C. or higher and 850° C. or lower
Implementation Method 2
the substrate holder which is made of silicon (Si) or silicon carbide (SiC), has a silicon oxide film on the surface and satisfies a relational equation Y=C−X
Implementation Method 3
a heat treatment step of heat-treating the mounted substrate at a constant temperature of 700° C. or higher and 850° C. or lower for 30 minutes or more and 120 minutes or less
Implementation Method 4
the reason is speculated that the crystal defects originating from the SF are defects due to clusters of phosphorus (P) and oxygen (O)
Data Source
AI summary
The substrate is doped with P, has a resistivity adjusted to 1.05 mΩ·cm or less, and includes defects, formed in the crystal by the aggregation of P, which are Si—P crystal defects substantially. The method includes a step of forming a silicon oxide film on the backside of the substrate with a thickness of 300 nm or more and 700 nm or less, a step of mirror-polishing the substrate, and after the mirror-polishing step, a heat treatment step of the substrate mounted on a substrate holder made of Si or SiC, on the holder surface a silicon oxide film is formed with the thickness between 200 nm and 500 nm, wherein the thickness X of the silicon oxide film of the holder and the thickness Y of that on the backside of the substrate satisfy a relational expression Y=C−X, where C is a constant between 800 and 1000.