Silicon Wafer Twin Region Detection via Epitaxial Overlay Mapping
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Solution Overview
Problem
Silicon wafers often contain crystal defects such as twins, which impair semiconductor device characteristics, and existing methods lack effective evaluation and exclusion of twin-affected regions during wafer production.
Innovation Solution
A method involving cutting multiple wafers from a silicon single-crystal ingot, mirror polishing, forming an epitaxial layer, acquiring light point defect maps with a laser surface inspection device, and creating an overlay map to identify linearly distributed light point defects, which indicate twin-induced defects, allowing for the estimation of twin-free or affected regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple wafers are cut from a silicon single-crystal ingot and subjected to mirror polishing and epitaxial layer formation, then the ability to identify twin-affected regions is improved, but the manufacturing complexity and process time increase
Solution Approach 1:
The method performs mirror polishing and epitaxial layer formation on multiple wafers before evaluation. This preliminary processing allows twin regions to manifest as detectable light point defects on the epitaxial layer surfaces, enabling accurate identification before final wafer production decisions are made.
Solution Approach 2:
Multiple wafers are processed as copies from the same silicon single-crystal ingot. By creating these replicate wafers and evaluating them through the same processing sequence, the method enables statistical identification of twin-affected regions through overlay mapping, improving measurement precision while distributing the evaluation workload.
2Measurement precision
If light point defect maps are acquired for multiple epitaxial wafers and overlay maps are created, then twin detection accuracy is improved, but the evaluation time and resource consumption increase
Solution Approach 1:
The method combines light point defect maps from multiple epitaxial wafers into a single overlay map. This merging process integrates defect information across multiple samples, allowing twin-affected regions to be identified with higher accuracy through the accumulation and correlation of defect patterns.
Solution Approach 2:
Instead of evaluating every possible wafer, the method processes a selected plurality of wafers (three or more) which is sufficient to achieve reliable twin detection. This partial action approach balances detection accuracy with time and resource consumption, avoiding unnecessary processing of excessive wafers.
3Reliability
If three or more wafers are processed through mirror polishing and epitaxial layer formation for evaluation, then the reliability of twin region estimation is improved, but the manufacturing cost and resource usage increase
Solution Approach 1:
The method applies the full processing sequence (mirror polishing, epitaxial layer formation) only to the minimum necessary number of wafers (three or more) required for reliable statistical evaluation. This local quality approach ensures that resources are concentrated on the critical evaluation function rather than being wasted on excessive processing.
Solution Approach 2:
The processing of multiple wafers is performed as a preliminary evaluation step before final production decisions. By conducting this reliability-enhancing processing in advance on a limited number of wafers, the method establishes confidence in twin region identification without committing resources to processing all potential production wafers through the same intensive sequence.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables accurate identification and exclusion of twin-affected regions, resulting in silicon wafers with improved device characteristics by ensuring the production of twin-free epitaxial wafers, enhancing semiconductor performance.
Implementation Method 1
acquiring light point defect maps of the epitaxial layer surfaces of the plural silicon epitaxial wafers with a laser surface inspection device
Implementation Method 2
processing the plural silicon mirror polished wafers into silicon epitaxial wafers through formation of an epitaxial layer on the mirror polished surfaces
Data Source
AI summary
A method of evaluating a silicon single-crystal ingot, the method including cutting out three or more plural silicon wafers from the ingot to be evaluated; mirror polishing the plural silicon wafers to yield silicon mirror-surface wafers; processing the plural silicon mirror polished wafers into silicon epitaxial wafers through formation of an epitaxial layer on the mirror polished surfaces; acquiring light point defect maps of the epitaxial layer surfaces of the plural silicon epitaxial wafers with a laser surface inspection device; and creating an overlay map. In a case where a light point defect group in which three or more light point defects are linearly distributed is not confirmed in the overlay map, a region, from which the plural silicon wafers have been cut out, in the silicon single-crystal ingot to be evaluated, is estimated not to be a region in which a twin has occurred.