Silicon Waveguide Platform with Buried Porous Silicon Tapers

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Solution Overview

Problem

Existing waveguide platforms struggle to efficiently integrate both larger and smaller waveguide regions on a single silicon wafer, requiring costly and complex methods like ion slicing, while also achieving efficient mode conversion between them.

Innovation Solution

A method involving electrochemical etching and epitaxial growth to create a waveguide platform with buried porous silicon tapers, allowing for the coexistence of larger and smaller waveguide regions with a single planar surface, using lithographically defined regions and porous silicon layers to define tapers between waveguide regions of different depths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single waveguide platform is used with uniform depth, then manufacturing simplicity is maintained, but the ability to integrate both larger and smaller waveguide regions is lost

Engineering Contradiction:

Improveability to integrate both larger and smaller waveguide regionsVSAvoidwaveguide platform structure

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The waveguide platform is segmented into multiple depth regions using buried porous silicon layers at different depths. The first buried porous silicon layer creates a first tapered region, while the second buried porous silicon layer creates a second tapered region, allowing different waveguide regions to have different depths and serve different functional requirements within the same platform.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention introduces vertical dimensionality variation by creating buried porous silicon layers at different depths within the waveguide platform. This multi-level porous structure enables the platform to support waveguides of different depths in the vertical dimension, thereby integrating both larger and smaller waveguide regions without requiring separate platforms.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Reliability

If ion slicing techniques are used to create tapered regions, then mode conversion between different waveguide sizes is achieved, but fabrication cost increases significantly

Engineering Contradiction:

Improvemode conversion efficiencyVSAvoidfabrication cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

Instead of using expensive ion slicing techniques to physically remove material and create tapers, the invention uses electrochemical etching to create porous silicon structures that replicate the desired tapered geometry. This copying approach through electrochemical etching achieves similar mode conversion functionality at lower cost compared to ion slicing.

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The invention replaces the mechanical ion slicing process with an electrochemical etching process. By substituting the mechanical removal of material with electrochemical formation of porous silicon, the method achieves comparable tapered region creation and mode conversion efficiency while significantly reducing fabrication complexity and cost.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Speed

If smaller waveguide regions are created with sub-micron dimensions, then operation speed is improved, but manufacturing precision requirements increase

Engineering Contradiction:

Improveoperation speedVSAvoidwaveguide dimension control

Core Design Contradiction:

SpeedVSManufacturing precision

Solution Approach 1:

The invention changes the manufacturing parameter approach by using electrochemical etching with controlled porosity rather than direct dimensional machining. The porous silicon structure allows precise control of the tapered region geometry through electrochemical parameters, enabling the creation of sub-micron waveguide regions with high precision while maintaining manufacturing feasibility.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the cost-effective fabrication of waveguide platforms with both larger and smaller waveguides, facilitating efficient mode conversion and reducing fabrication costs, while maintaining low optical losses and improved polarization dependence.

Implementation Method 1

electrochemically etching the waveguide platform to create porous silicon at the lithographically defined first region

Methodology Applied

Scientific EffectElectrochemical etching: Electrolysis

Implementation Method 2

epitaxially growing crystalline silicon on top of the porous silicon to create a first upper crystalline layer with a first buried porous silicon region underneath

Methodology Applied

Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS12117647B2Waveguide platform

Publication Date: 2024.10.15 ROCKLEY PHOTONICS LTD

AI summary

A waveguide platform and method of fabricating a waveguide platform on a silicon wafer; the method comprising: providing a wafer having a layer of crystalline silicon; lithographically defining a first region of the top layer; electrochemically etching the waveguide platform to create porous silicon at the lithographically defined first region; epitaxially growing crystalline silicon on top of the porous silicon to create a first upper crystalline layer with a first buried porous silicon region underneath; wherein the first buried porous silicon region defines a taper between a first waveguide region of crystalline silicon having a first depth and a second waveguide region of crystalline silicon having a second depth which is smaller than the first depth.