Silicon-28 Superlattice Epitaxy to Block Dopant Diffusion

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Solution Overview

Problem

Current semiconductor devices do not fully leverage advanced materials and processing techniques to achieve optimal performance in terms of charge carrier mobility and device efficiency.

Innovation Solution

The method involves forming a superlattice structure with a plurality of stacked silicon monolayers and non-semiconductor monolayers within the crystal lattice, which reduces the effective mass of charge carriers, enhancing mobility and providing a barrier to prevent dopant and material diffusion, thereby improving device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional semiconductor materials and structures are used, then manufacturing processes are simpler, but charge carrier mobility is insufficient

Engineering Contradiction:
Improvecharge carrier mobilityVSAvoidstructure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The semiconductor structure is segmented into multiple thin monolayer layers (silicon and non-semiconductor layers) stacked alternately to form a superlattice. Each layer is only a few monolayers thick, creating a segmented structure that reduces charge carrier effective mass and enhances mobility while maintaining manufacturability through controlled epitaxial growth

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention uses composite material structures combining silicon monolayers with non-semiconductor monolayers (such as SiO2, SiN4, or SiC) to create a superlattice. This composite structure provides both the mobility enhancement from the alternating layers and the barrier properties needed to prevent dopant diffusion, resolving the contradiction between performance and complexity

Inventive Principle:
Principle #40Composite materials

2Speed

If dopant diffusion is allowed for manufacturing simplicity, then device performance degrades due to scattering effects

Engineering Contradiction:
Improvecharge carrier mobilityVSAvoidmanufacturing process control
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

Non-semiconductor monolayer bars are introduced as intermediary barrier layers between silicon layers and dopant sources. These intermediary layers (such as SiO2 or SiN4 monolayers) prevent dopant atoms from diffusing into the silicon channel region, eliminating scattering effects and maintaining high carrier mobility while allowing standard doping processes to be used

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the physical and chemical parameters at the interfaces by introducing monolayer barriers with different atomic structures and bonding characteristics. This parameter change at the monolayer level creates an effective barrier to dopant diffusion without requiring changes to the overall device architecture or doping工艺流程

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in higher charge carrier mobility and reduced scattering effects, making the semiconductor devices more efficient and suitable for various applications, including opto-electronic devices.

Implementation Method 1

The superlattice structure with a plurality of stacked silicon monolayers and non-semiconductor monolayers reduces the effective mass of charge carriers, enhancing mobility

Methodology Applied
Scientific EffectEffective mass reduction:

Implementation Method 2

The superlattice structure provides a barrier to prevent dopant and material diffusion

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 3

The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base silicon portions

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS11810784B2Method for making semiconductor device including a superlattice and enriched silicon 28 epitaxial layer
Publication Date: 2023.11.07 ATOMERA INC
  • US11810784B2 patent drawing
  • US11810784B2 patent drawing
  • US11810784B2 patent drawing

AI summary

A method for making a semiconductor device may include forming a first single crystal silicon layer having a first percentage of silicon 28, and forming a superlattice above the first single crystal silicon layer. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base silicon portions. The method may further include forming a second single crystal silicon layer above the superlattice having a second percentage of silicon 28 higher than the first percentage of silicon 28.