Silicon-28 Superlattice Epitaxy for Mobility and Diffusion Control
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Solution Overview
Problem
Existing semiconductor devices could benefit from advanced materials and processing techniques to enhance charge carrier mobility and reduce defects for improved performance.
Innovation Solution
The formation of a superlattice structure with controlled energy band-modifying layers, such as Si/O, to create a lower effective mass for charge carriers, acting as a barrier to dopant and material diffusion, and providing a common energy band structure for enhanced mobility and reduced scattering effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a superlattice structure with non-semiconductor monolayers is formed, then charge carrier mobility is enhanced and scattering is reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The superlattice structure segments the semiconductor layer into alternating monolayers of semiconductor material (e.g., silicon) and non-semiconductor material (e.g., oxygen, carbon, nitrogen). This segmentation creates distinct regions that modify energy bands and reduce scattering, enhancing charge carrier mobility while maintaining a manageable periodic structure
Solution Approach 2:
The invention uses composite material structures where semiconductor and non-semiconductor monolayers are combined in a periodic superlattice. This composite approach allows tuning of electronic properties through material selection and layer thickness control, achieving enhanced mobility without excessive complexity
2Reliability
If enriched silicon layers are used to reduce defects and improve performance, then device reliability improves, but manufacturing cost increases
Solution Approach 1:
The invention applies enriched silicon-28 locally in specific layers of the superlattice structure where it provides maximum benefit for reducing scattering and improving mobility, rather than enriching the entire device structure. This localized approach reduces material costs while maintaining performance benefits
Solution Approach 2:
The invention changes the isotopic composition parameter of silicon in specific layers to enriched silicon-28, which reduces nuclear scattering effects. This parameter change is applied selectively to achieve performance improvement at reduced cost compared to full-device enrichment
3Speed
If thin monolayer structures are used to create quantum confinement and modify energy bands, then charge carrier mobility increases, but manufacturing precision requirements increase
Solution Approach 1:
The epitaxial growth process self-regulates the monolayer thickness through control of deposition conditions (temperature, pressure, gas flow rates). The atomic layer-by-layer growth mechanism inherently provides precise thickness control, reducing the need for external precision control systems
Solution Approach 2:
The invention replaces mechanical thickness control methods with chemical epitaxial growth processes that provide atomic-level precision. The chemical reactions during epitaxial growth naturally terminate at monolayer boundaries, providing inherent thickness control without mechanical intervention
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The superlattice structure achieves higher charge carrier mobility and reduces defects, facilitating the use of enriched silicon layers like 28Si at lower costs by preventing intermixing and enhancing device performance.
Implementation Method 1
forming a superlattice above the first single crystal silicon layer. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base silicon portions
Implementation Method 2
acting as a barrier to dopant and material diffusion
Implementation Method 3
The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base silicon portions
Implementation Method 4
forming a second single crystal silicon layer above the superlattice having a second percentage of silicon 28 higher than the first percentage of silicon 28
Data Source
AI summary
A method for making a semiconductor device may include forming a first single crystal silicon layer having a first percentage of silicon 28, and forming a superlattice above the first single crystal silicon layer. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base silicon portions. The method may further include forming a second single crystal silicon layer above the superlattice having a second percentage of silicon 28 higher than the first percentage of silicon 28.