Siloxane Buffering Layer for TFT Crack Prevention
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Solution Overview
Problem
The manufacturing of thin film transistor (TFT) substrates often results in defects due to the formation of cracks in the interlayer insulating layer, particularly when thick gate electrodes with steep side surfaces are used, leading to increased resistance and reduced manufacturing yields.
Innovation Solution
A step buffering layer comprising a main buffering layer and auxiliary buffering layers formed from siloxane-based materials is introduced, connecting the side surface of the gate electrode to the upper surface of the insulating layer, which reduces the steep inclination and prevents crack formation in the interlayer insulating layer, thereby minimizing defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick gate electrodes with steep side surfaces are used, then electrical conductivity is improved, but crack formation in the interlayer insulating layer occurs
Solution Approach 1:
A buffering layer made of siloxane-based material is introduced as an intermediary between the thick gate electrode and the interlayer insulating layer. This buffering layer has a gentler slope than the gate electrode, allowing the interlayer insulating layer to be formed without cracks while maintaining the electrical conductivity benefits of the thick gate electrode.
Solution Approach 2:
The problem is solved by adding a new dimensional element - the buffering layer - between the gate electrode and the interlayer insulating layer. This additional layer creates a gradual transition in the vertical dimension, reducing the steepness of the side surface and preventing crack formation during subsequent processing steps.
2Reliability
If thick gate electrodes are used, then resistance is reduced, but manufacturing yield decreases due to defects
Solution Approach 1:
The siloxane-based buffering layer serves as a mediator that enables the formation of thick gate electrodes with reduced resistance while preventing the defect formation that would otherwise reduce manufacturing yield. The buffering layer absorbs the mechanical stress that would cause cracks, allowing high-yield production of low-resistance devices.
3Reliability
If steep side surfaces of gate electrodes are formed, then device performance is improved, but peeling phenomena occur in the interlayer insulating layer
Solution Approach 1:
The buffering layer acts as an adhesion promoter and mechanical transition zone between the steep gate electrode and the interlayer insulating layer. It distributes the mechanical stress more evenly, preventing peeling phenomena while preserving the device performance benefits of the steep gate electrode profile.
Solution Approach 2:
The buffering layer changes the geometric parameters of the structure by providing a gradual slope transition. This parameter change in the side surface angle reduces the mechanical stress concentration that causes peeling, while maintaining the original gate electrode dimensions and electrical characteristics.
Data Source
AI summary
A thin film transistor (TFT) substrate includes an insulating layer, an electrode on the insulating layer, and a main buffering layer connecting a side surface of the electrode to an upper surface of the insulating layer.