SIMD Arithmetic Circuit with Element Permutation and Data Exchange
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Solution Overview
Problem
As the number of SIMD arithmetic elements increases, the efficiency of arithmetic processing decreases due to the need for extensive data exchange and distribution among elements, leading to increased circuit size and complexity.
Innovation Solution
An arithmetic circuit design that includes input circuits, element data selectors, and a common data bus to facilitate inter-element operations such as permutation, shift, masking, and compression, allowing for efficient data management and reduced circuit size through the use of selectors and control signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of SIMD arithmetic elements is increased to enhance processing speed, then parallel processing capability is improved, but data wiring range and circuit size increase
Solution Approach 1:
Multiple SIMD arithmetic elements (first to N-th element circuits) are merged into a unified parallel processing system that shares common data buses and control structures. The element circuits share data buses DB1 and DB2, and control signals are uniformly applied to all elements, reducing redundant wiring and circuit size while maintaining high parallel processing capability
Solution Approach 2:
The data buses and control signal lines are designed to serve multiple SIMD arithmetic elements simultaneously. The same data bus infrastructure is used for data input, output, and inter-element communication across all N elements, making the circuit structure universal and scalable without proportionally increasing wiring complexity
2Adaptability or versatility
If extensive data exchange and distribution among SIMD elements is performed, then arithmetic processing versatility is improved, but circuit complexity increases
Solution Approach 1:
Data buses DB1 and DB2 serve as intermediary communication channels between SIMD arithmetic elements and external interfaces. These buses mediate data flow, allowing versatile data exchange and distribution patterns without requiring direct complex interconnections between all element pairs, thus reducing circuit complexity while maintaining processing versatility
Solution Approach 2:
The circuit employs dynamic control signals (control signal 1 and control signal 2) that can be adjusted to change data routing patterns and operation modes. This dynamic control allows the same circuit structure to adapt to different arithmetic processing requirements, achieving versatility without increasing hardware complexity
Data Source
AI summary
An arithmetic circuit comprises first to N-th, N being an integer equal to or larger than two, element circuits respectively including: input circuits which input first operand data and second operand data; and element data selectors which select operand data of any one of the element circuits on the basis of a request element signal; and a data bus which supplies the operand data from the input circuits to the element data selectors. When a control signal is in a first state, the element data selectors select, on the basis of the request element signal included in the second operand data, the first operand data of any of the element circuits and output the first operand data.