SIMD Compressed Index Vector Decompression

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Solution Overview

Problem

In-memory database systems face performance bottlenecks due to memory bandwidth and access latency, and compressed index vectors require specialized operations for decompression and manipulation, which can hinder efficiency and memory utilization.

Innovation Solution

Implementing 512-bit SIMD instructions to efficiently decompress and manipulate compressed index vectors, leveraging vector processing and parallelization techniques to optimize database operations, allowing for wider registers, cross-lane permutes, and mask registers to enhance performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If compressed index vectors are used to conserve memory, then memory usage is reduced, but specialized decompression operations are required which can hinder processing efficiency

Engineering Contradiction:
Improvememory usageVSAvoidprocessing efficiency
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent pre-loads decompression lookup tables into CPU cache memory before actual decompression operations are needed. This preliminary action ensures that when decompression is required, the lookup tables are already available in fast cache memory, eliminating the need for slow main memory access during critical processing paths and maintaining high processing efficiency while using compressed index vectors.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces specialized SIMD-based decompression operations as an intermediary layer between compressed index vectors and the actual data. These specialized operations use vectorized instructions to perform parallel decompression, bridging the gap between space-efficient compressed storage and the need for efficient data access, thereby resolving the contradiction between memory conservation and processing efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If standard vector processing operations are used on compressed index vectors, then implementation is simpler, but performance is suboptimal due to inability to leverage parallelization effectively

Engineering Contradiction:
Improveimplementation complexityVSAvoidparallelization efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent changes the operational parameters by implementing specialized SIMD instructions tailored for compressed index vector operations. These instructions operate directly on compressed data formats without requiring full decompression, changing the parameter of data representation to enable efficient parallel processing while maintaining implementation feasibility through hardware-level optimizations.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the decompression and manipulation operations into distinct SIMD instruction sequences that can be executed in parallel. By breaking down the processing into manageable vector operations that leverage CPU parallelization capabilities, the patent achieves high productivity without excessive implementation complexity, as each segmented operation can be independently optimized.

Inventive Principle:
Principle #1Segmentation

3Speed

If 512-bit SIMD instructions are implemented to enhance performance, then query processing speed improves, but hardware requirements and system complexity increase

Engineering Contradiction:
Improvequery processing speedVSAvoidhardware requirements
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent implements 512-bit SIMD instructions with multi-functionality, where the same hardware infrastructure supports both traditional scalar operations and specialized vectorized decompression operations. This universal approach allows the system to achieve high query processing speeds through SIMD instructions while avoiding the need for separate dedicated hardware, thereby limiting the increase in system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent enables the CPU's existing SIMD hardware to serve dual purposes: traditional vector processing and specialized compressed index vector decompression. The hardware essentially serves itself by utilizing its own parallel processing capabilities for both general-purpose and specialized database operations, achieving high speed without requiring external specialized hardware additions.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11036517B2Database management system performing column operations using a set of SIMD processor instructions selected based on performance
Publication Date: 2021.06.15 SAP SE
  • US11036517B2 patent drawing
  • US11036517B2 patent drawing
  • US11036517B2 patent drawing

AI summary

Disclosed herein are system, method, and computer program product embodiments for performing operations on compressed index vectors in columnar in-memory database management systems. By utilizing SIMD processor instructions, database management systems may perform operations that compress and decompress bit vectors and evaluate predicates.