SIMD Processor Concurrent ROI Data Transfer via Control Processor Requests

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Solution Overview

Problem

Data transfer in SIMD processor systems is inefficient due to the need for separate transfer of data for each processing element (PE), leading to time overhead and unnecessary data transfer, making SIMD mode unfeasible for tasks like pedestrian or white line detection.

Innovation Solution

The solution involves transferring data by first specifying the parameter set for each ROI area from the assigned PE to the control processor, which then generates autonomous requests for each element of each ROI area, allowing parallel storage and transfer, thereby reducing unnecessary data transfer and optimizing data handling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If separate data transfer for each PE is performed using masking operations, then data can be transferred to the correct internal memory locations, but transfer time increases significantly and SIMD parallelism is lost

Engineering Contradiction:
Improvedata transfer accuracyVSAvoiddata transfer speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent divides the data transfer operation into two independent phases: (1) bulk transfer of complete data sets to all PEs simultaneously, and (2) selective distribution of specific ROI data to individual PEs using masking. This segmentation allows the high-speed bulk transfer to operate at full SIMD parallelism while the masking operation only handles the small overhead of selecting which PEs receive data, thereby resolving the contradiction between transfer accuracy and speed.

Inventive Principle:
Principle #1Segmentation

2Productivity

If whole element rows are transferred using line transfer operation, then data transfer efficiency is improved, but unnecessary data is transferred when only specific ROI areas are needed

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoidunnecessary data transfer
Core Design Contradiction:
ProductivityVSLoss of substance

Solution Approach 1:

The patent extracts only the necessary ROI (Region of Interest) data from the complete data sets after bulk transfer. By using masking operations on the already-transferred data, the system extracts only the specific regions needed by each PE without having to perform selective transfer during the bulk data movement phase. This eliminates unnecessary data transfer while maintaining high transfer efficiency for the essential data.

Inventive Principle:
Principle #2Taking out (Extraction)

3Device complexity

If sequential processing of ROI areas is performed in the central processor, then implementation complexity is reduced, but processing power of the PE array is unused and processing time increases

Engineering Contradiction:
Improveimplementation complexityVSAvoidprocessing speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent enables each PE to independently identify and process its own ROI data by equipping PEs with the capability to determine their assigned ROI areas autonomously. The control processor provides minimal guidance (bulk transfer of complete data sets and masking parameters), while the PEs themselves perform the selective data distribution and processing without requiring complex centralized control for each individual transfer operation.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9996500B2Apparatus and method of a concurrent data transfer of multiple regions of interest (ROI) in an SIMD processor system
Publication Date: 2018.06.12 RENESAS ELECTRONICS CORP
  • US9996500B2 patent drawing
  • US9996500B2 patent drawing
  • US9996500B2 patent drawing

AI summary

This present invention provides a fast data transfer for a concurrent transfer of multiple ROI areas between an internal memory array and a single memory where each PE can specify the parameter set for the area to be transferred independently from the other PE. For example, for a read transfer, the requests are generated in a way that first the first element of each ROI area is requested from the single memory for each PE before the following elements of each ROI area are requested. After the first element from each ROI area has been received from the single memory in a control processor and has been transferred from the control processor over a bus system to the internal memory array, all elements are in parallel stored to the internal memory array. Then, the second element of each ROI area is requested from the single memory for each PE. The transfer finishes after all elements of each ROI area are transferred to their assigned PEs.