Dynamic FEU Scheduling for SIMD Thread Divergence

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Solution Overview

Problem

In Single Instruction Multiple Data (SIMD) architecture, conditional branch divergence leads to idle SIMD lanes and performance degradation, as each SIMD lane may follow a different control flow, resulting in inefficient thread management and processing speeds.

Innovation Solution

The implementation of multiple Front End Units (FEUs) and a controller that schedules thread groups based on SIMD lane availability, manages active thread information, and optimizes instruction fetching and distribution to minimize idle lanes and improve performance through dynamic scheduling and time-space division.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single FEU is used to process thread groups in SIMD architecture, then device complexity is reduced, but SIMD lanes become idle during thread divergence leading to performance degradation

Engineering Contradiction:
Improveprocessing performanceVSAvoidnumber of FEUs
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system dynamically activates or deactivates FEUs based on thread divergence detection and SIMD lane availability. The controller monitors thread execution states and adjusts the number of active FEUs in real-time, transitioning from a static single-FEU configuration to a dynamic multi-FEU configuration only when thread divergence occurs, thereby improving performance while minimizing unnecessary complexity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The processing system is segmented into multiple independent FEUs that can be selectively activated. Each FEU can independently fetch and execute instructions for different thread groups, allowing the system to partition workloads across multiple execution units when thread divergence creates idle lanes, rather than relying on a single overloaded FEU

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple FEUs are activated to process divergent threads, then idle SIMD lanes are reduced, but control complexity increases due to need for scheduling and coordination

Engineering Contradiction:
ImprovethroughputVSAvoidcontrol complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The controller automatically monitors thread divergence states and SIMD lane availability, then self-manages the activation and scheduling of multiple FEUs without external intervention. The system includes built-in mechanisms for detecting when thread groups diverge and autonomously configuring the number of active FEUs based on real-time execution states, reducing the need for complex external control logic

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system implements feedback mechanisms where the controller continuously monitors thread execution states and SIMD lane utilization, then adjusts FEU activation and scheduling decisions based on this feedback. This closed-loop control allows the system to adaptively optimize throughput by activating additional FEUs only when thread divergence creates idle lanes, rather than maintaining constant high complexity

Inventive Principle:
Principle #23Feedback

3Productivity

If threads are scheduled without considering SIMD lane availability, then scheduling simplicity is maintained, but idle lanes increase reducing processing efficiency

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidscheduling complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The controller performs preliminary detection of thread divergence and SIMD lane availability before scheduling additional FEUs. By proactively identifying when idle lanes will occur due to thread divergence, the system can pre-configure the number of active FEUs and their assigned thread groups, avoiding the need for complex real-time rescheduling while maintaining high processing efficiency

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10831490B2Device and method for scheduling multiple thread groups on SIMD lanes upon divergence in a single thread group
Publication Date: 2020.11.10 SAMSUNG ELECTRONICS CO LTD
  • US10831490B2 patent drawing
  • US10831490B2 patent drawing
  • US10831490B2 patent drawing

AI summary

Provided are an apparatus and a method for effectively managing threads diverged by a conditional branch based on Single Instruction Multiple-based Data (SIMD). The apparatus includes: a plurality of Front End Units (FEUs) configured to fetch, for execution by SIMD lanes, instructions of thread groups of a program flow; and a controller configured to schedule a thread group based on SIMD lane availability information, activate an FEU of the plurality of FEUs, and control the activated FEU to fetch an instruction for processing the scheduled thread group.