SIMD Secure Hashing Round Slice Execution
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Solution Overview
Problem
Current cryptographic hash functions face challenges in efficiently executing secure hashing algorithms within modern microprocessor pipelines due to complexity and latency issues, particularly when handling thousands of hash algorithm rounds, which hinders performance and integration with standard execution pipelines.
Innovation Solution
The implementation of SIMD secure hashing round slice functionality through specific instructions and processing logic that decode and execute secure hashing algorithm rounds, allowing for parallel processing and concurrent execution with other instructions, thereby reducing latency and improving throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If secure hashing algorithms are executed within modern microprocessor pipelines, then cryptographic security is maintained, but processing throughput is reduced due to complexity and latency issues
Solution Approach 1:
The patent segments the hash algorithm execution into multiple independent round functions that can be processed in parallel. Each round function operates on different data elements simultaneously, dividing the sequential hashing process into concurrent parallel tasks that maintain security while improving throughput.
Solution Approach 2:
The patent transitions from single-data-element processing to multi-data-element parallel processing by utilizing SIMD (Single Instruction Multiple Data) architecture. This dimensional change allows the same hash algorithm to operate on multiple data elements simultaneously across different processing lanes, dramatically increasing throughput while maintaining cryptographic security.
2Reliability
If thousands of hash algorithm rounds are calculated, then cryptographic security is strengthened, but execution time increases significantly
Solution Approach 1:
The patent performs preliminary preparation of round constants and data elements before the actual hashing begins. Message blocks are pre-loaded into SIMD registers and round constants are pre-computed, allowing the main hashing loops to execute efficiently without repeated memory access overhead, thus reducing execution time for thousands of rounds.
Solution Approach 2:
The patent maintains continuous processing by pipelineing the hash rounds so that while one round is completing, the next round is being prepared. The SIMD architecture allows overlapping of computation stages across multiple rounds, eliminating idle cycles and maintaining continuous useful action throughout the execution of thousands of hash rounds.
3Device complexity
If standard microprocessor pipelines are used for hash algorithms, then hardware simplicity is maintained, but latency increases due to pipeline constraints
Solution Approach 1:
The patent makes the microprocessor pipeline universal by designing the hash algorithm execution to follow the same fetch-decode-execute-retire stages as other instructions. The hash algorithm is implemented using standard SIMD instructions that can be seamlessly integrated into the existing pipeline without requiring dedicated hash hardware, thus maintaining hardware simplicity while reducing latency through efficient pipeline utilization.
Data Source
AI summary
Instructions and logic provide SIMD secure hashing round slice functionality. Some embodiments include a processor comprising: a decode stage to decode an instruction for a SIMD secure hashing algorithm round slice, the instruction specifying a source data operand set, a message-plus-constant operand set, a round-slice portion of the secure hashing algorithm round, and a rotator set portion of rotate settings. Processor execution units, are responsive to the decoded instruction, to perform a secure hashing round-slice set of round iterations upon the source data operand set, applying the message-plus-constant operand set and the rotator set, and store a result of the instruction in a SIMD destination register. One embodiment of the instruction specifies a hash round type as one of four MD5 round types. Other embodiments may specify a hash round type by an immediate operand as one of three SHA-1 round types or as a SHA-2 round type.