SIMD Lattice Computation via Dummy Node Insertion

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Solution Overview

Problem

The existing SIMD function in CPUs and GPUs cannot be used to speed up computation processing in the lattice method due to the varying number of nodes at different levels, preventing parallel vector operations.

Innovation Solution

A computing device with a SIMD function adds dummy nodes to enable vector operations by deciding the number and positions of dummy nodes to match the number of nodes at the previous level, allowing calculations to be performed using the SIMD function.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the lattice method is used for numerical computation, then computation accuracy is improved, but the varying number of nodes at different levels prevents the use of SIMD functions, reducing processing speed

Engineering Contradiction:
Improvecomputation accuracyVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing the correspondence relationships between node values at different lattice levels before actual computation. This preprocessing step creates a lookup table that enables rapid retrieval during SIMD operations, resolving the contradiction by preparing data structures in advance that accommodate variable node counts while maintaining high-speed parallel processing capability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary data structure (correspondence relationship table) that mediates between the variable node counts at different lattice levels and the fixed-width SIMD registers. This intermediary layer maps variable-sized node value sets to fixed-size register operations, enabling SIMD acceleration without compromising the accuracy of lattice method computations

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If dummy nodes are added to enable vector operations, then processing speed is improved through SIMD function usage, but device complexity increases due to additional nodes and correspondence management

Engineering Contradiction:
Improveprocessing speedVSAvoidcomputation structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies copying by creating virtual dummy nodes that replicate the structure needed for SIMD operations without adding physical computational resources. These dummy nodes are software-level abstractions that copy the necessary data patterns to fill SIMD registers, enabling vector operations while avoiding the hardware complexity of physically adding extra lattice nodes

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent changes parameters by dynamically adjusting the correspondence relationships between node values based on the actual number of nodes at each lattice level. Rather than fixing the node structure, the system modifies the mapping parameters to match the variable node counts, allowing SIMD operations to adapt to different lattice configurations without increasing structural complexity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8612507B2Computing device, calculating method, and program product
Publication Date: 2013.12.17 NS SOLUTIONS CORPORATION
  • US8612507B2 patent drawing
  • US8612507B2 patent drawing
  • US8612507B2 patent drawing

AI summary

A computing device includes: a deciding unit which, in computation of values of nodes on a lattice in a direction where a value of m representing a horizontal axis coordinate of the lattice increases, decides dummy nodes to be added to m=n−1, so as to enable values of nodes on m=n to be calculated by adding the dummy nodes to m=n−1 and executing a vector operation through the use of the SIMD function by using values of nodes on m=n−1 and values of the added dummy nodes; an adding unit adding the dummy nodes decided by the deciding unit to m=n−1; and a calculating unit calculating the values of the nodes present on m=n by executing the vector operation through the use of the SIMD function by using the values of the nodes on m=n−1 and the values of the dummy nodes added by the adding unit.