SIMD Engine Non-Local Return via Execution Stack Token Management

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Solution Overview

Problem

SIMT architectures lack support for non-local returns, which limits the functionality and flexibility of programming code sequences executed on processors, particularly during exception handling scenarios.

Innovation Solution

Implementing a method that includes receiving a long jump instruction, popping a token from the execution stack, and determining if it is a long jump token to jump active threads to a specified instruction or disable them until the token is popped, ensuring correct instruction execution through token management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If SIMT architecture processes parallel threads synchronously to increase processing efficiency, then productivity is improved, but the ability to perform non-local returns is lost, reducing adaptability

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidnon-local return capability
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

An execution stack is introduced as an intermediary data structure to store return addresses and thread state information. This stack enables non-local returns by providing a mechanism to save and restore execution context across synchronous thread boundaries, thereby adding adaptability without disrupting the synchronous parallel execution model

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent adds a temporal dimension to thread execution by implementing asynchronous thread switching within the SIMT architecture. Threads can be suspended and resumed at different times, allowing non-local returns to occur across different execution phases while maintaining overall synchronous processing efficiency

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If non-local returns are implemented in SIMT architecture to improve functionality, then adaptability is improved, but thread synchronization may be disrupted, reducing productivity

Engineering Contradiction:
Improveexception handling capabilityVSAvoidparallel processing efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The thread execution model is segmented into distinct states (active, suspended, resumed) managed through the execution stack. This segmentation allows non-local returns to be handled as discrete events that do not disrupt the overall synchronous execution flow, maintaining productivity while enabling exception handling capability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic thread state management where threads can transition between active and suspended states based on non-local return operations. This dynamic approach allows the system to adapt to exception handling requirements while maintaining efficient parallel processing by keeping threads active when possible

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8572355B2Support for non-local returns in parallel thread SIMD engine
Publication Date: 2013.10.29 NVIDIA CORP
  • US8572355B2 patent drawing
  • US8572355B2 patent drawing
  • US8572355B2 patent drawing

AI summary

One embodiment of the present invention sets forth a method for executing a non-local return instruction in a parallel thread processor. The method comprises the steps of receiving, within the thread group, a first long jump instruction and, in response, popping a first token from the execution stack. The method also comprises determining whether the first token is a first long jump token that was pushed onto the execution stack when a first push instruction associated with the first long jump instruction was executed, and when the first token is the first long jump token, jumping to the second instruction based on the address specified by the first long jump token, or, when the first token is not the first long jump token, disabling the active thread until the first long jump token is popped from the execution stack.