SIMD Packet Processing Parallel Vector Execution

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Solution Overview

Problem

Current network processing technologies face computational burdens due to high network traffic, which can rob applications of processor resources and slow down packet processing, especially as speeds increase.

Innovation Solution

Implementing Single-Instruction/Multiple-Data (SIMD) instructions to process network packets in parallel, allowing for simultaneous operations on multiple packets, thereby increasing throughput and reducing processing time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional serial packet processing is used, then processing is simple to implement, but processing speed decreases and processor resources are consumed by high network traffic volume

Engineering Contradiction:
Improvepacket processing speedVSAvoidprocessor resource availability for applications
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The patent segments packets into fixed-size blocks (e.g., 64-byte segments) and organizes them into vectors for parallel processing. Each packet is divided into multiple segments that can be processed simultaneously using SIMD instructions, transforming serial packet processing into parallel block processing to increase throughput and reduce processor resource consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple packet segments into vector structures that can be processed together using single SIMD instructions. By combining segments from multiple packets into unified data structures, the system performs batch operations that process many packets simultaneously, improving processing speed while reducing the overall computational burden on processor resources.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If packet processing operations are performed on high volume network traffic, then network communication is maintained, but computational burden increases and processing time increases

Engineering Contradiction:
Improvenetwork throughputVSAvoidpacket processing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements continuous parallel processing by maintaining pipeline operations where packet segmentation, vector formation, SIMD processing, and result assembly occur simultaneously in overlapping stages. This continuous action ensures high network throughput is maintained without idle processing time, as each stage operates concurrently with others rather than sequentially.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent transforms traditional single-threaded packet processing into multi-dimensional parallel processing by organizing packets into vectors and using SIMD instructions that operate on multiple data elements simultaneously. This dimensional transformation from serial to parallel processing reduces processing time while maintaining or increasing network throughput through simultaneous operations on multiple packets.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Speed

If processing resources are allocated to handle high speed network traffic, then network performance is improved, but application performance deteriorates due to resource consumption

Engineering Contradiction:
Improvenetwork processing speedVSAvoidprocessor resource consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements self-service by using hardware-accelerated SIMD instructions that are natively supported by modern processors. These instructions perform parallel packet processing operations efficiently using built-in processor capabilities rather than consuming general-purpose CPU cycles, allowing the system to maintain high network processing speed while minimizing the impact on application performance through dedicated processing pathways.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP2382537B1SIMD processing of network packets
Publication Date: 2018.09.12 INTEL CORP
  • EP2382537B1 patent drawingFigure 1
  • EP2382537B1 patent drawingFigure 2
  • EP2382537B1 patent drawingFigure 3

AI summary

Executing a single instruction/multiple data (SIMD) instruction of a program to process a vector of data wherein each element of the packet vector corresponds to a different received packet.