SIMD SM4 Cryptographic Logic for High-Throughput Encryption
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Solution Overview
Problem
Existing technologies face challenges in efficiently implementing the SM4 cryptographic block cipher, particularly in terms of performance and circuit area, especially when compared to software implementations.
Innovation Solution
The development of instructions and logic for a Single Instruction Multiple Data (SIMD) SM4 round slice operation, which allows for simultaneous execution of SM4-round exchanges and key generations using the same SIMD instruction, enabling concurrent processing of encryption or decryption with key expansion in a small buffer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If software implementation of SM4 is used, then flexibility and ease of implementation are improved, but processing performance deteriorates significantly
Solution Approach 1:
The patent replaces software-based cryptographic processing with dedicated hardware logic circuits that implement SM4 encryption/decryption functions. This substitution of mechanical/software systems with hardware systems resolves the contradiction by providing both the ease of implementation through standardized logic blocks and high processing performance through parallel hardware execution.
Solution Approach 2:
The patent divides the SM4 cryptographic algorithm into multiple independent round functions (typically 32 rounds) that can be executed in parallel. Each round processes different data blocks simultaneously using separate logic paths, thereby achieving high throughput while maintaining the structured ease of implementation through modular design.
2Productivity
If straightforward hardware implementations using lookup memories or truth tables are used, then encryption speed is improved, but circuit area increases significantly
Solution Approach 1:
The patent transforms the cryptographic computation from table-lookup operations to algebraic operations in Galois Fields (GF(2^8)). By changing the computational parameters from memory-based lookup to field-based arithmetic (multiplication, inversion, addition), the implementation achieves high encryption speed through efficient hardware arithmetic while reducing circuit area by eliminating large lookup tables.
Solution Approach 2:
The patent replaces memory-based lookup mechanisms with arithmetic computation logic operating in Galois Fields. This substitution eliminates the need for large lookup memories or truth tables, thereby maintaining high encryption speed through efficient arithmetic operations while significantly reducing the circuit area required for implementation.
3Area of stationary object
If finite field approaches isomorphic to GF(256) are used, then circuit area is reduced, but processing speed deteriorates
Solution Approach 1:
The patent segments the finite field operations into parallel processing paths, where multiple round functions operate simultaneously on different data blocks. This segmentation maintains the area efficiency of finite field approaches while restoring processing speed through parallel execution, allowing the system to achieve both compact circuit area and high throughput.
Solution Approach 2:
The patent introduces dynamic parallelism by allowing multiple finite field operation units to execute concurrently, with each unit processing different portions of the cryptographic data. This dynamic approach maintains the area efficiency of compact finite field logic while achieving high processing speeds through simultaneous execution of multiple operational instances.
Data Source
AI summary
Instructions and logic provide for a Single Instruction Multiple Data (SIMD) SM4 round slice operation. Embodiments of an instruction specify a first and a second source data operand set, and substitution function indicators, e.g. in an immediate operand. Embodiments of a processor may include encryption units, responsive to the first instruction, to: perform a slice of SM4-round exchanges on a portion of the first source data operand set with a corresponding keys from the second source data operand set in response to a substitution function indicator that indicates a first substitution function, perform a slice of SM4 key generations using another portion of the first source data operand set with corresponding constants from the second source data operand set in response to a substitution function indicator that indicates a second substitution function, and store a set of result elements of the first instruction in a SIMD destination register.