SIMD Stride Predicate Caching for Low-Overhead Interleaved Execution

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Solution Overview

Problem

The computational overhead of recalculating stride length predicates in SIMD processors is significant when dealing with varying strides, leading to increased processing times and resource consumption, which offsets the performance gains from using SIMD processing capabilities.

Innovation Solution

Pre-calculating predicates of sub-vector width in sequences and leveraging pre-established patterns based on the last used predicate to minimize computational overhead during instruction execution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If stride length predicates are recalculated during instruction execution, then processing accuracy is maintained, but processing time and computational overhead increase significantly

Engineering Contradiction:
Improvepredicate accuracyVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent pre-calculates stride length predicates and stores them in a predicate cache before instruction execution. When an instruction is executed, the pre-computed predicate is retrieved from cache rather than calculated during execution, eliminating the computational overhead while maintaining accuracy. This is achieved by computing predicates based on stride length and vector width parameters in advance and storing them for rapid access during SIMD operations.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If stride length predicates are pre-calculated and cached, then processing speed improves, but memory usage and cache management complexity increase

Engineering Contradiction:
Improveprocessing speedVSAvoidcache management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent manages predicate cache complexity by parameterizing predicates based on stride length and vector width. Instead of caching all possible predicates, the system computes cache indices using these parameters, allowing dynamic access to pre-computed predicates without storing every possible combination. This reduces cache memory requirements and simplifies management while maintaining fast access for common stride lengths and vector widths.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If predicates are used for selective data processing, then processing efficiency improves by avoiding unnecessary operations, but predicate creation overhead increases

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidcomputational overhead
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent resolves this contradiction by pre-computing predicates during idle periods or alongside other setup operations, so that when SIMD instructions execute, the predicate creation work has already been done. The pre-computed predicates are stored and reused across multiple instruction executions with the same stride length and vector width parameters, amortizing the computational overhead and enabling efficient selective processing without recurring creation costs.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP4671974A1Stride length predicate creation
Publication Date: 2025.12.31 ANALOG DEVICES INT UNLTD CO
  • EP4671974A1 patent drawingFigure 1
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AI summary

System and techniques for creating a single-instruction multiple-data (SIMD) processor predicate based on stride length are described herein. When an instruction for a SIMD processor is received, and the instruction has a specified stride length, a predicate memory can be read to obtain a current predicate. A new predicate can be determined based on the stride length and the current predicate. The new predicate is written to the predicate memory. When an instance of the instruction is executed by the SIMD processor, the execution is performed on a subset of data loaded into the SIMD processor based on the new predicate read from the predicate memory.