Simulation Framework Coordinates Multiple Simulators

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Solution Overview

Problem

The complexity of modern circuit designs makes system-level simulation difficult due to the variety and interdependence of subsystems, making it impractical to simulate entire systems within a single simulator.

Innovation Solution

A computer-based simulation framework that coordinates multiple simulators to model and simulate different subsystems of a circuit design, allowing for system-level simulation by linking and coordinating the operation of various simulators, each executing models of different subsystems, and supporting the use of multiple simulators based on suitability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If system-level simulation is performed using a single simulator, then the simulation can cover the entire system, but the simulation becomes impractical due to the size and complexity of the system

Engineering Contradiction:
Improvesimulation completenessVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the complex system into multiple independent subsystems, each simulated by a separate simulator. The system is segmented into functional modules that can be modeled and simulated independently, then integrated through a framework that coordinates data exchange between simulators. This segmentation makes the simulation manageable while maintaining system-level coverage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a simulation framework as an intermediary layer that coordinates multiple subsystem simulators. This framework manages data exchange, timing synchronization, and integration between separate simulator instances, enabling system-level simulation without requiring a single monolithic simulator to handle the entire complex system.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the entire system is simulated within a single simulator, then complete system verification is achieved, but the simulation time becomes excessive

Engineering Contradiction:
Improveverification completenessVSAvoidsimulation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By segmenting the system into subsystems that can be simulated in parallel or sequentially with optimized timing, the overall simulation time is reduced while maintaining verification completeness. Each subsystem can be simulated at its own optimal time scale without being constrained by a single simulator's time management.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent allows for selective simulation of subsystems based on verification needs. Not all subsystems need to be simulated with the same level of detail or simultaneously - partial simulation of critical paths and selective detailed modeling of key subsystems reduces overall simulation time while maintaining sufficient verification coverage.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20230367923A1Framework for system simulation using multiple simulators
Publication Date: 2023.11.16 XILINX INC
  • US20230367923A1 patent drawing
  • US20230367923A1 patent drawing
  • US20230367923A1 patent drawing

AI summary

A simulation framework is capable modeling a hardware implementation of a reference software system using models specified in different computer-readable languages. The models correspond to different ones of a plurality of subsystems of the hardware implementation. Input data is provided to a first simulator configured to simulate a first model of a first subsystem of the modeled hardware implementation. The input data is captured from execution of the reference software system. The first simulator executing the first model generates a first data file specifying output of the first subsystem. The first data file specifies intermediate data of the modeled hardware implementation. The first data file is provided to a second simulator configured to simulate a second model of a second subsystem of the modeled hardware implementation. The second simulator executing the second model generates a second data file specifying output of the second subsystem.