Simulation Framework for Electronic Module Design
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Solution Overview
Problem
The existing electronic design automation (EDA) tools require time-consuming processes for generating simulation files, especially when custom IP cores are involved, leading to delays in chip design and manufacturing, and require frequent updates for design changes.
Innovation Solution
A method and system that allow users to define the functional and power behavior of electronic components using user-defined design intent files, generating simulation files based on these definitions, and running simulations to determine the performance status of electronic module designs, thereby reducing reliance on third-party vendors and speeding up the design process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If third-party EDA tool vendors are used to generate simulation files, then simulation accuracy and reliability are improved, but development time and turnaround time increase significantly
Solution Approach 1:
The patent implements self-service by enabling design teams to generate their own simulation files using automated scripts and predefined templates, eliminating the need to outsource this task to third-party EDA tool vendors. The system provides self-contained simulation file generation capabilities that allow teams to independently create, update, and manage simulation files for IP cores without external vendor involvement.
Solution Approach 2:
The patent applies preliminary action by pre-configuring simulation file templates, parameters, and structures before the actual simulation need arises. By establishing standardized templates and automation scripts in advance, the system enables rapid generation of simulation files when needed, significantly reducing the turnaround time compared to ad-hoc generation by third-party vendors.
2Productivity
If custom IP cores with specially-designed cells are simulated using standard library cells, then simulation speed is improved, but simulation accuracy deteriorates
Solution Approach 1:
The patent segments the simulation file generation process into distinct components: standard library cell definitions for common functions, and custom cell definitions for specially-designed IP core components. This segmentation allows the simulation to use optimized standard cells where applicable while accurately representing custom behavior where needed, balancing speed and accuracy.
Solution Approach 2:
The patent applies local quality by allowing different parts of the simulation model to have different levels of detail and accuracy. Standard library cells use predefined, optimized models for speed, while custom IP core cells use user-defined behavioral models that accurately reflect specific design characteristics. This localized approach to modeling quality ensures accuracy where needed without sacrificing overall simulation performance.
3Reliability
If simulation file packages are updated by EDA tool vendors for design changes, then simulation reliability is maintained, but iteration speed and productivity decrease
Solution Approach 1:
The patent implements dynamics by creating a flexible, adaptive simulation file generation system that can automatically adjust to design changes. Rather than requiring static, vendor-updated packages, the system dynamically regenerates simulation files based on updated IP core specifications, maintaining reliability through consistent regeneration from authoritative design sources while enabling rapid iteration.
Solution Approach 2:
The patent applies feedback by establishing automated processes that monitor design changes and trigger corresponding simulation file updates. The system continuously compares current IP core definitions against simulation file contents, automatically regenerating simulation files when changes are detected, thereby maintaining synchronization and reliability without manual vendor intervention.
Data Source
AI summary
A method comprises creating an electronic module design having a plurality of electronic components and defining a model of functional behavior of a subset of the plurality of electronic components, the subset of the plurality of electronic components excluding a first electronic component. Functional behavior of the first electronic component is defined in a user-defined functional design intent file based on a first template, and a power behavior of the first electronic component is defined in a user-defined power design intent file based on a second template. A simulation file is generated based on the model of functional behavior and based on the functional behavior and the power behavior of the first electronic component. The simulation file is run to simulate operation of the electronic module design. A performance status is determined of the electronic module design in response to running the simulation file.


