Simulation Device Timing Robustness Verification
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Solution Overview
Problem
Existing simulation methods, such as those described in Patent Literature 1, cannot perform behavior verification effectively due to timing differences caused by CPU load fluctuations and hardware waiting, lacking timing robustness.
Innovation Solution
A simulation device that calculates and adjusts the execution processing time of instruction codes based on change rules, allowing for timing robustness by modifying the execution time of each instruction code and incorporating these changes into the simulation's entire time point, enabling monitoring of the target model's status during execution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If execution processing time is changed according to change rules to simulate timing differences, then verification quality is improved, but device complexity increases
Solution Approach 1:
The simulation device is segmented into five functional sections: calculation section, storage section, change section, simulation execution section, and monitoring section. Each section handles a specific aspect of the timing robustness verification, dividing the complex task of simulating timing differences into manageable, specialized components that work together systematically.
Solution Approach 2:
The invention changes the execution processing time parameter of instruction codes according to predefined change rules. By dynamically adjusting this parameter in the change section based on storage conditions, the system simulates various timing scenarios (CPU load fluctuations, hardware waiting) without requiring physical hardware changes, thus improving verification quality while maintaining a relatively simple device structure.
2Measurement precision
If timing robustness verification is performed by simulating CPU load fluctuations and hardware waiting, then behavior verification accuracy is improved, but simulation time increases
Solution Approach 1:
The storage section pre-stores change rules that define how execution processing times should be modified under different timing scenarios. By preparing these rules in advance, the change section can quickly apply appropriate timing adjustments during simulation without requiring complex real-time calculations, thus achieving accurate timing robustness verification while controlling simulation time.
Solution Approach 2:
Instead of using actual hardware to simulate timing behaviors, the invention creates a virtual copy of the timing characteristics through the change section that modifies instruction execution times according to stored rules. This virtual timing model replicates CPU load fluctuations and hardware waiting behaviors without the time constraints of physical hardware, improving verification accuracy while reducing simulation time.
Data Source
AI summary
In a simulation device (100), a calculation section (113) calculates an execution processing time required for executing each instruction code (221) of a plurality of instruction codes. A storage section (140) stores change setting information (230) in which a change rule that changes execution processing times of the plurality of instruction codes included in the processing unit is set. A change section (115) changes the execution processing time into a changed processing time according to the change rule being set in the change setting information (230). The change section (115) also includes the changed processing time of each instruction code of the plurality of instruction codes, in an entire time point (240). A simulation execution section (116) executes a simulation of a target program (210) using the entire time point (240). A monitoring section (120) monitors a status of a target model during execution of the simulation.