Simulator Interface for Testbench Bus Protocol Automation
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Solution Overview
Problem
Developing a testbench for digital circuit simulation is time-consuming, especially when it involves complex bus protocols like AXI4-stream, as designers need to manually implement bus logic that may have already been verified, leading to unnecessary complexity and potential errors.
Innovation Solution
A simulator interface that handles bus protocol interactions on behalf of the testbench, using high-level programming language objects and dynamically linked libraries to interface with circuit simulations, allowing for language-standard input/output streams and simulating handshaking according to the hardware bus protocol, thereby reducing the need for low-level pin control and error-prone manual implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a testbench manually implements bus protocol code to interface with circuit simulation, then the testbench can communicate with the circuit, but the development time and complexity increase significantly
Solution Approach 1:
The patent introduces a simulator interface as an intermediary component that automatically handles bus protocol communication between the testbench and circuit simulation. This interface layer translates high-level testbench operations into low-level bus protocol signals, eliminating the need for manual protocol implementation while maintaining full communication capability.
Solution Approach 2:
The patent replaces manual mechanical implementation of bus protocol code with an automated software-based simulator interface. Instead of writing custom hardware protocol handlers in the testbench, the system uses pre-implemented software abstraction layers that automatically manage protocol details, substituting manual coding with automated software mediation.
2Adaptability or versatility
If the testbench includes code to operate according to the bus protocol, then communication with the circuit is achieved, but the complexity of the testbench increases
Solution Approach 1:
The simulator interface is designed as a universal component that handles multiple bus protocol types through a single unified implementation. The interface provides generic methods for data transfer, addressing, and control signals that work across different protocol variants, eliminating the need for separate protocol-specific code for each communication standard.
Solution Approach 2:
The simulator interface serves as a protocol-agnostic intermediary that translates between the testbench's high-level operations and the circuit's low-level protocol requirements. This mediation layer abstracts away protocol-specific details, allowing the testbench to remain simple while maintaining adaptability to different bus protocols through configuration rather than code changes.
3Reliability
If the bus logic is verified separately, then the bus module reliability is improved, but requiring testbench code to operate according to the bus protocol adds unnecessary complexity
Solution Approach 1:
The simulator interface acts as a mediator that leverages the pre-verified bus logic by providing a standardized interface layer. This interface automatically utilizes the verified bus module functionality without requiring the testbench to directly interact with the bus protocol, thereby preserving the reliability benefits of separate verification while eliminating the complexity of re-implementing protocol code.
Solution Approach 2:
The simulator interface is designed to be self-configuring and self-managing, automatically adapting to the verified bus logic without requiring manual protocol implementation in the testbench. The interface handles protocol translation and coordination autonomously, allowing the testbench to focus solely on high-level test scenarios while the interface manages the complexity of interacting with the verified bus module.
Data Source
AI summary
Approaches for simulating a circuit include receiving simulation input data from a testbench executing on a computer system by a simulator interface executing on the computer system. The simulator interface receives simulation output data the according to a hardware bus protocol specified by a simulated circuit for communication and simulates handshaking with the simulated circuit according to the hardware bus protocol in response to receiving the simulation input data and simulation output data. The simulator interface provides the simulation input data to the simulated circuit by according to the hardware bus protocol and provides the simulation output data to the testbench.