SiMulPro Cores with STAR Messaging for Virus Immunity
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Solution Overview
Problem
Existing systems are vulnerable to virus and rootkit infections through data memory devices, messages, and operations, limiting their performance and reliability, especially in multi-processor cores and memory systems.
Innovation Solution
The implementation of Simultaneous Multi-Processor (SiMulPro) cores with separate task-control and data memory controllers, combined with the STAR messaging protocol and Error Control Circuitry, ensures immunity to virus and rootkit infections by physically separating data and task/control communications and using advanced error correction mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data memory devices and data communications are integrated with processor systems, then functionality and performance are improved, but vulnerability to virus and rootkit infections increases
Solution Approach 1:
The system is divided into separate task-control memory space and data memory space, with distinct controllers for each. This segmentation isolates the critical task-control functions from potential infections in data memory, allowing high-performance data processing while maintaining reliability through spatial separation of concerns.
Solution Approach 2:
A separate task-control memory controller acts as an intermediary between the processor and data memory devices. This mediator enforces security policies and prevents direct unauthorized access to data memory by malicious code, enabling both high-performance data access and protection against infections.
2Reliability
If separate task-control and data memory controllers are implemented, then immunity to virus and rootkit infections is improved, but device complexity increases
Solution Approach 1:
The task-control memory controller is designed with multi-functional capabilities, handling both memory management and security enforcement functions. This universal design consolidates multiple responsibilities into a single component, reducing overall system complexity while maintaining infection immunity through integrated security policies.
3Reliability
If advanced error correction mechanisms are used, then fault resilience is improved, but energy consumption increases
Solution Approach 1:
The system implements error correction mechanisms selectively and partially, applying advanced error correction only to critical task-control memory operations while using simpler correction methods for data memory. This partial application maintains fault resilience for essential functions while reducing overall energy consumption compared to full-spectrum advanced error correction.
Data Source
AI summary
Infection by viruses and rootkits from data memory devices, data messages and data operations are rendered impossible by construction for the Simultaneous Multi-Processor (SiMulPro) cores, core modules, Programmable Execution Modules (PEM), PEM Arrays, STAR messaging protocol implementations, integrated circuits (referred to as chips herein), and systems composed of these components. Greatly improved energy efficiency is disclosed. A system implementation of an Application Specific Integrated Circuit (ASIC) communicating with a DRAM controller interacting with a DRAM array is presented with this resistance to virus and rootkit infection, and simultaneously capable of 1 Teraflop (Tflop) FP16, 1 TFlop FP32 and 1 Tflop FP64 performance while accessing 1 Tbyte of DRAM with a power budget comparable to today's desktop or notebook computers accessing 8 Gbytes of DRAM. Innovations to the STAR communication apparatus will enable the optical communication between chips to carry at least ½ Tbit/second data to and from DRAMs, and each other.