SiN Waveguide Integration via Wafer Bonding
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Solution Overview
Problem
Current technologies face challenges in integrating high-speed modulators and SiN waveguides coupled to detectors in SiN-based photonic integrated circuit platforms, particularly due to the incompatibility of high-temperature LPCVD processes with standard BEOL processes, which limits the fabrication of low-loss SiN waveguides in the wavelength range of 0.4 μm to 1.8 μm.
Innovation Solution
The integration of ultra-low loss SiN waveguides in the BEOL section of integrated optoelectronic devices is achieved through wafer-to-wafer bonding, allowing LPCVD materials to be deposited on a separate bonding wafer, enabling the formation of low-, moderate-, and high-optical confinement SiN waveguides without thermal treatment on the host semiconductor wafer, and using wafer-to-wafer bonding to create a bonding interface between interconnect layer pairs, thereby enabling the inclusion of SiN waveguides in the BEOL section.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If LPCVD processes are used to deposit SiN waveguides, then ultra-low loss waveguides can be achieved, but high temperature thermal treatment is required which is incompatible with standard BEOL processes
Solution Approach 1:
The fabrication process is segmented into two independent parts: SiN waveguide deposition on a separate bonding wafer using LPCVD, and subsequent wafer-to-wafer bonding to integrate with the BEOL section. This segmentation allows the high-temperature LPCVD process to occur on the bonding wafer without exposing the BEOL section to damaging temperatures, while still achieving ultra-low loss waveguides.
Solution Approach 2:
A separate bonding wafer acts as an intermediary substrate that temporarily holds the SiN waveguide layers during LPCVD deposition. This intermediary allows the waveguides to be fabricated under optimal high-temperature conditions and then transferred to the final device via wafer-to-wafer bonding, isolating the BEOL section from thermal damage.
2Adaptability or versatility
If SiN waveguides are integrated in the BEOL section, then monolithic integration is achieved, but thermal constraints from standard BEOL processes limit the fabrication of low-loss waveguides
Solution Approach 1:
The integration approach segments the SiN waveguide fabrication from the BEOL processing by using a separate bonding wafer. This allows monolithic integration to be achieved through wafer-to-wafer bonding while the actual waveguide deposition occurs independently on the bonding wafer under optimal high-temperature conditions.
Solution Approach 2:
The SiN waveguide layers are deposited on the bonding wafer in advance using LPCVD before the wafer-to-wafer bonding step. This preliminary action allows the waveguides to be pre-fabricated with optimal properties and then integrated into the BEOL section without subjecting the final device to high temperatures.
3Temperature
If wafer-to-wafer bonding is used to integrate SiN waveguides, then thermal constraints are reduced, but additional fabrication steps are required
Solution Approach 1:
The bonding wafer serves as an intermediary that simplifies the overall process by consolidating the high-temperature LPCVD deposition steps on a single substrate that is later bonded to the BEOL section. This intermediary approach manages fabrication complexity by separating thermal processing from device integration.
Solution Approach 2:
The SiN waveguide deposition and the bonding wafer preparation are merged into a single fabrication sequence on the bonding wafer, followed by a single wafer-to-wafer bonding step to integrate with the BEOL section. This merging reduces the total number of separate high-temperature processing steps that would otherwise be required.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the fabrication of ultra-low loss SiN waveguides in the BEOL section, reducing thermal constraints and enabling efficient integration with standard silicon technologies, while also reducing substrate losses and enabling coupling with fast Ge photodetectors, thereby enhancing the opto-electrical bandwidth and performance of photodetectors.
Implementation Method 1
such low loss SiN waveguides may require low pressure chemical vapour deposition (LPCVD) materials which are deposited at temperatures well above 700° C.
Implementation Method 2
a wafer-to-wafer bonding interface is formed between a first of the interconnect layer pairs and a second of the interconnect layer pairs
Data Source
AI summary
The present invention relates to a semiconductor structure comprising a semiconductor wafer and a photonic integrated circuit or an electronic-photonic integrated circuit, hereinafter commonly referred to as integrated circuit, on the semiconductor wafer. The integrated circuit comprises a front-end-of-line section, hereinafter FEOL section, and comprises a back-end-of-line section, hereinafter BEOL section, with interconnect layer pairs each comprising a metal interconnect layer and an interlevel dielectric layer. A wafer-to-wafer bonding interface between a first of the interconnect layer pairs and a second of the interconnect layer pairs is arranged closer to the FEOL section than the first interconnect layer pair or a wafer-to-wafer bonding interface is formed between the first of the interconnect layer pairs and the FEOL section. The first interconnect layer pair comprises at least one SiN waveguide.