Synchronizing Interface Network Controller for Multi-Processor Lane Coherency

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing methods for synchronizing processing across multiple processors introduce significant data latency and require external hardware, leading to increased power consumption and complexity, while maintaining lane coherence and ensuring multi-threaded synchronous processing within the same time window remains a challenge.

Innovation Solution

A system utilizing a synchronizing interface network controller (SINC) that coordinates processors to ensure synchronized processing by monitoring time windows and releasing processors only when all are ready to perform operations within those windows, eliminating the need for external hardware and minimizing memory requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If network switch loopback is used to synchronize inbound and outbound message processing, then lane coherency is maintained, but data latency increases and external hardware requirements increase

Engineering Contradiction:

Improvelane coherencyVSAvoiddata latency

Core Design Contradiction:

Stability of the object's compositionVSLoss of time

Solution Approach 1:

The patent extracts the synchronization function from external hardware (network switch) and relocates it to software-based mechanisms within the processors themselves. The performance counter and synchronization logic are implemented as software constructs rather than external hardware components, eliminating the need for network switch loopback while maintaining lane coherency.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a software-based intermediary mechanism (performance counter synchronized across processors) to coordinate message processing without requiring external hardware. The performance counter acts as a mediator that all processors can access and update, enabling synchronization through shared software state rather than external hardware control.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Stability of the object's composition

If additional shared memory is used to synchronize message processing, then lane coherency is maintained, but memory size increases to accommodate worst-case skew

Engineering Contradiction:

Improvelane coherencyVSAvoidmemory size

Core Design Contradiction:

Stability of the object's compositionVSQuantity of substance

Solution Approach 1:

Instead of allocating memory for the worst-case scenario (excessive action), the patent uses performance counters that naturally track and limit the actual skew between processors. The synchronization mechanism only accommodates the actual observed skew rather than provisioning for maximum possible skew, reducing memory requirements while maintaining effectiveness.

Inventive Principle:

Principle #16Partial or excessive action

3Stability of the object's composition

If additional shared memory and software are used to synchronize processing, then lane coherency is maintained, but device complexity and power requirements increase

Engineering Contradiction:

Improvelane coherencyVSAvoidsystem complexity

Core Design Contradiction:

Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The performance counter serves multiple functions: it tracks processor performance, measures message processing skew, and acts as a synchronization barrier. This multi-functionality eliminates the need for separate synchronization hardware and reduces overall system complexity while maintaining lane coherency.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Stability of the object's composition

If external hardware is used to synchronize processing, then lane coherency is maintained, but power consumption increases

Engineering Contradiction:

Improvelane coherencyVSAvoidpower consumption

Core Design Contradiction:

Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The patent replaces the mechanical/electrical external hardware system (network switch) with a software-based synchronization mechanism using performance counters. This substitution eliminates the power consumption associated with external hardware while maintaining the synchronization function necessary for lane coherency.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12135970B2System and method for synchronizing processing between a plurality of processors

Publication Date: 2024.11.05 THE BOEING CO

AI summary

A system, method and computer program product to synchronize processing across multiple lanes. In a system, a synchronizing interface network controller (SINC) communicates with a plurality of processors. Each processor executes an application having thread(s) of operation. Each processor notifies the SINC when a specific thread is ready to perform a respective operation. The SINC releases the processors to perform the respective operation upon being notified by all processors that the specific thread is ready to perform the respective operation. Each processor is configured to monitor for the release of the processors and to also determine whether sufficient time remains within a time window to perform the respective operation. If insufficient time remains, a processor notifies the SINC that the specific thread is no longer ready to perform the respective operation. If the processors are released by the SINC while sufficient time remains, each processor performs the respective operation.