Single-Chip SINCOS Encoder Interface for Low-Noise Position Sensing
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Solution Overview
Problem
Existing SINCOS encoders for rotary shafts require multiple individual chips, leading to increased signal noise, complexity, and cost due to numerous board interconnects, which limits their functionality in providing both coarse and fine position information effectively.
Innovation Solution
A single-chip implementation of a SINCOS encoder incorporating multiple analog-to-digital converters (ADCs), comparators, a pulse counter, and processing logic, such as a microprocessor, to determine and provide both coarse and fine position information, reducing signal noise and complexity by integrating all components on a single die.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple individual chips are used to implement SINCOS encoder functionality, then the encoder can provide coarse and fine position information, but signal noise, complexity, and cost increase due to numerous board interconnects
Solution Approach 1:
The patent combines multiple encoder chips into a single integrated SINCOS encoder chip that includes all necessary components (sine wave generator, cosine wave generator, quadrature decoder, and output circuitry). This merging eliminates the need for multiple separate chips and their interconnecting traces, thereby reducing signal noise and simplifying the overall device complexity while maintaining the capability to provide both coarse and fine position information
2Ease of manufacture
If multiple individual chips are used with numerous board interconnects, then the encoder components can be implemented, but signal delays, noise, and losses increase
Solution Approach 1:
By integrating all encoder components onto a single chip, the patent eliminates numerous board interconnects that cause signal delays, noise, and losses. The merged design ensures that sine and cosine wave signals are generated and processed internally without external trace connections, significantly improving signal quality and reliability while maintaining ease of manufacture through a unified device
3Adaptability or versatility
If multiple individual chips are used, then the encoder functionality is achieved, but manufacturing and operational costs increase
Solution Approach 1:
The patent integrates multiple encoder functions into a single SINCOS encoder chip, reducing the total component count and assembly complexity. This merging approach lowers manufacturing costs by eliminating the need to source, test, and assemble multiple separate chips, while also reducing operational costs through simplified installation and maintenance. The unified chip maintains full encoder functionality including both coarse and fine position information provision
Data Source
AI summary
In an example, a circuit includes a first comparator, a second comparator, a pulse counter, a processor, a first ADC, and a second ADC. The first comparator has a first input coupled to a first node, a second input, and an output. The second comparator has a first input coupled to a second node, a second input, and an output. A first DAC is coupled to the second input of the first comparator. A second DAC is coupled to the second input of the second comparator. The pulse counter has a first input coupled to the output of the first comparator and a second input coupled to the output of the second comparator. The first ADC has an input coupled to the first node and an output coupled to the processor. The second ADC has an input coupled to the second node and an output coupled to the processor.