Single ADC Under-Sampling for NFC I/Q Demodulation
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Solution Overview
Problem
Current NFC integrated circuits require redundant components and high power consumption due to dual signal paths and ADCs, leading to increased noise and complexity, which affects signal quality and SNR.
Innovation Solution
Implementing a single ADC that under-samples the RF carrier signal using a multiplexer to select a phase-shifted clock signal at a reduced frequency, eliminating redundant analog signal preconditioning blocks and utilizing a DSP for demodulation, thereby reducing chip space and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If dual signal paths with two ADCs are used for I/Q demodulation, then signal reconstruction accuracy is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent merges the functions of two separate ADCs and dual signal paths into a single ADC by using sequential sampling with phase-shifted clock signals. The first ADC samples the in-phase component during a first time interval, then samples the quadrature component during a second time interval, eliminating the need for redundant hardware while maintaining I/Q demodulation capability
Solution Approach 2:
The single ADC is designed to perform multiple functions by switching between sampling the in-phase and quadrature components using phase-shifted clock signals. This multi-functional approach allows one ADC to replace what traditionally required two dedicated ADCs, reducing device complexity while maintaining signal reconstruction accuracy
2Measurement precision
If dual signal paths with two ADCs are used for I/Q demodulation, then signal reconstruction accuracy is improved, but power consumption increases
Solution Approach 1:
The patent combines the power consumption of two ADCs into a single ADC by time-multiplexing the sampling function. The single ADC alternates between sampling the in-phase and quadrature components using phase-shifted clock signals, reducing total power consumption while maintaining the ability to reconstruct the modulated signal accurately
Solution Approach 2:
The system uses periodic sampling with phase-shifted clock signals to alternately sample the in-phase and quadrature components. This periodic action allows a single ADC to perform the work of two ADCs over time, reducing power consumption while maintaining signal reconstruction accuracy through systematic time-multiplexed sampling
3Adaptability or versatility
If phase-shifted clock signals are generated for dual ADC operation, then I/Q demodulation capability is improved, but noise increases due to lag time
Solution Approach 1:
The patent merges the I/Q demodulation capability into a single ADC system that uses phase-shifted clock signals for sequential sampling. By combining the sampling function into one ADC with carefully controlled phase shifts, the system achieves I/Q demodulation capability while minimizing noise through synchronized operation rather than independent dual-ADC operation
4Adaptability or versatility
If mixers are used for signal preconditioning, then signal processing capability is improved, but power supply rejection issues add noise
Solution Approach 1:
The patent extracts and removes the mixer component from the signal preconditioning chain, replacing it with direct ADC sampling of the RF signal. By taking out the mixer, the system eliminates the power supply rejection issues and associated noise generation while maintaining signal processing capability through digital signal processing in the baseband processor
Solution Approach 2:
The patent replaces the analog mixer-based signal processing system with a direct digital sampling approach. Instead of using mixers for frequency conversion and signal conditioning, the system uses a single ADC to directly sample the RF signal with phase-shifted clock signals, substituting analog signal processing with digital processing to eliminate mixer-related noise
Data Source
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AI summary
Various embodiments relate to a method and apparatus for a method for under sampling a RF carrier signal, the method including receiving, by an analog digital converter, the RF carrier signal, selecting, by a multiplexer, a clock signal which includes a first clock signal and a second clock signal which are phase shifted , receiving, by the ADC, the clock signal which has a frequency less that the frequency of the RF carrier signal, sampling, by the ADC, the RF carrier signal using the selected clock signal and demodulating, by a digital signal processor, the RF carrier signal into I channel data and Q channel data for I/Q demodulation.