Single ADC Over Sampling Architecture for NFC Signal Reconstruction

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Solution Overview

Problem

Current NFC integrated circuits require redundant components and increased power consumption due to dual ADCs and complex analog signal preconditioning, leading to noise and lower SNR.

Innovation Solution

Implementing a single ADC that samples at a higher frequency, omitting redundant analog components, and using a DSP with a moving average filter and delay unit to process RF carrier signals, allowing for efficient signal preconditioning and noise reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dual ADCs with complex analog signal preconditioning are used, then signal reconstruction capability is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improvesignal reconstruction capabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the functionality of two separate ADCs and their associated analog signal preconditioning circuits into a single ADC system. The single ADC samples both in-phase and quadrature components by alternating between them using a multiplexer, eliminating the need for redundant dual-ADC architecture while maintaining the capability to reconstruct signals with both amplitude and phase information.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single ADC is designed to perform multiple functions: it sequentially samples both the in-phase signal path and the quadrature signal path, effectively replacing the specialized dual-ADC architecture. This multi-functional approach allows one ADC to accomplish what previously required two dedicated ADCs with separate analog preprocessing chains.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If dual ADCs with phase-shifted clocks are used, then signal demodulation capability is improved, but noise increases due to lag time

Engineering Contradiction:
Improvesignal demodulation capabilityVSAvoidnoise
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent combines the sampling of both signal paths into a single ADC operation, using a time-division multiplexing approach. Instead of running two separate ADCs with phase-shifted clocks that introduce lag and noise, one ADC alternates between sampling the in-phase and quadrature paths, eliminating the inter-ADC timing synchronization issues and associated noise.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If mixers are used for signal conditioning, then signal demodulation is improved, but power supply rejection becomes poor adding noise

Engineering Contradiction:
Improvesignal demodulationVSAvoidnoise
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent replaces the analog mixer-based signal conditioning approach with a direct sampling architecture. Instead of using mixers that require precise local oscillators and suffer from power supply rejection issues, the system directly samples the RF signals with a single high-speed ADC, performing the demodulation function digitally or through simpler analog switching, thereby eliminating mixer-induced noise.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Reliability

If redundant analog components are used, then signal preconditioning capability is improved, but power consumption increases

Engineering Contradiction:
Improvesignal preconditioning capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple redundant analog components (two ADCs, two signal paths with separate preprocessing) into a single integrated sampling system. This consolidation eliminates the power consumption associated with running duplicate analog circuits while maintaining signal preconditioning capability through the single ADC's ability to handle both in-phase and quadrature sampling.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP3419182B1A method and apparatus for using an over sampling architecture to achieve a software defined radio for NFC integrated circuits
Publication Date: 2023.04.26 NXP BV
  • EP3419182B1 patent drawingFigure 1
  • EP3419182B1 patent drawingFigure 2
  • EP3419182B1 patent drawingFigure 3

AI summary

Various embodiments relate to a method and apparatus for over sampling a RF carrier signal, the method including receiving, by an ADC, the RF carrier signal, sampling, by the ADC, the RF carrier signal using the selected clock signal which is at least quadruple the RF carrier signal, down sampling, by a RF-DSP, the RF carrier signal by a factor of two to generate I channel data and Q channel data, mixing down, by the RF-DSP, the I channel data and the Q channel data, and outputting, by the RF-DSP, the I channel data and Q channel data to a baseband DSP.