Single Backside Process for Double Gate MOSFET Fabrication
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Solution Overview
Problem
Conventional methods for manufacturing multi-gate MOSFET devices, such as double gate/gate-all-around (GAA) and variable threshold voltage MOSFETs, are hindered by complex and costly lithography and etching processes, making them inefficient for large-scale production.
Innovation Solution
A single backside process is employed to fabricate double gate/GAA and variable threshold voltage MOSFET devices, involving the formation of gates on both sides of the channel, with gate spacers and sacrificial gates, allowing for the creation of high-performance GAA devices and low-power variable threshold voltage devices using a common or separate gate contact configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional lithography and etching schemes are used to manufacture multi-gate MOSFET devices, then device performance and channel control are improved, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The patent inverts the conventional manufacturing sequence by first forming the channel and source/drain regions, then growing gate spacers, and finally forming gates on both front and back sides of the device. This reverse approach eliminates complex lithography and etching steps while achieving the desired multi-gate configuration with simpler processing
Solution Approach 2:
The patent transitions from planar single-sided gate processing to three-dimensional dual-sided gate formation by growing spacers and forming gates on both the front and back sides of the MOSFET device, enabling gate-all-around control without complex lateral patterning
2Manufacturing precision
If complex lithography and etching schemes are used for multi-gate MOSFET fabrication, then gate configuration precision is improved, but production time and cost increase
Solution Approach 1:
The patent performs preliminary actions by first forming the channel and source/drain regions with precise dimensional control, then growing gate spacers that automatically define gate positions and dimensions. This preliminary structuring eliminates the need for subsequent complex lithography and etching steps to achieve precise gate configuration
Solution Approach 2:
The gate spacers self-form through epitaxial growth around the channel and source/drain regions, automatically establishing the correct gate dimensions and positions without requiring external lithography patterning. The structure serves itself to define the gate geometry with high precision
Data Source
AI summary
Double gate/gate-all-around and variable threshold voltage MOSFET devices and techniques for fabrication thereof in a single backside process are provided. In one aspect, a MOSFET device includes: a channel in between source/drain regions; at least one first gate disposed on a first side of the channel at a frontside of the MOSFET device; gate spacers offsetting the source/drain regions from the at least one first gate; and at least one second gate disposed on a second side of the channel directly opposite the at least one first gate at a backside of the MOSFET device. At least one gate contact can be present in direct contact with the at least one first gate and the at least one second gate. A method of forming a MOSFET device is also provided.