Single-Chip Galvanic Isolation with Magnetic Coupling

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing signal isolation technologies, such as optocouplers, are limited by low data rates and high power consumption, necessitating the development of more efficient multi-domain galvanic isolation solutions for applications like medical equipment, telecommunications, and industrial control systems.

Innovation Solution

A single-chip integrated circuit with multiple galvanically isolated domains and signal coupling structures, including capacitive, inductive, and GMR coupling, allowing communication between domains while maintaining isolation, and featuring a control integrated circuit to apply oscillating differential signals for switching and rectification purposes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If optocouplers are used for signal isolation, then galvanic isolation is achieved, but data rate is limited to low levels and power consumption increases

Engineering Contradiction:
Improvegalvanic isolationVSAvoiddata rate
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent replaces traditional optocoupler-based optical isolation with a magnetic field-based isolation mechanism using GMR (giant magnetoresistance) elements. This substitution enables high-speed digital signal transmission while maintaining galvanic isolation, resolving the contradiction between reliable isolation and high data rate capability

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention changes the fundamental operating parameters by using magnetic field coupling instead of optical coupling. This parameter change allows the system to achieve both high data rates (up to several Gbps) and low power consumption while maintaining effective galvanic isolation across multiple domains

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple isolated domains are implemented using traditional methods, then galvanic isolation is maintained, but device complexity and manufacturing cost increase

Engineering Contradiction:
Improvegalvanic isolationVSAvoidmulti-chip assembly
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple galvanically isolated domains onto a single semiconductor chip, integrating what would traditionally require multiple separate chips or complex multi-chip modules. This consolidation reduces device complexity, manufacturing cost, and assembly complexity while maintaining reliable galvanic isolation between domains through magnetic field coupling

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single-chip design provides multi-functionality by enabling multiple isolated domains to coexist on one chip, allowing the device to serve various applications (medical equipment, telecommunications, industrial control) from a single integrated platform, thereby reducing overall system complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If traditional isolation devices are used, then isolation is achieved, but integration level remains low and manufacturing cost increases

Engineering Contradiction:
ImproveisolationVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The invention combines multiple isolation domains and signal coupling structures into a single chip fabrication process, eliminating the need for separate chips, packaging, and assembly steps. This merging significantly reduces manufacturing cost while maintaining reliable isolation through standard semiconductor manufacturing techniques

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent uses standard semiconductor copying and lithography techniques to pattern the GMR elements, interconnect structures, and isolation regions on the chip. This approach leverages established manufacturing processes, reducing cost and improving ease of manufacture compared to specialized isolation device fabrication

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables higher data rates and reduced power consumption by integrating multiple isolated domains on a single die, facilitating compact, cost-effective, and high-integration isolation devices suitable for various applications, including high-voltage drivers and isolated switches.

Implementation Method 1

signal coupling structures on the die to allow communication of signals between the integrated circuit portions while maintaining the galvanic isolation therebetween

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Implementation Method 2

signal coupling structures on the die to allow communication of signals between the integrated circuit portions while maintaining the galvanic isolation therebetween

Methodology Applied
Scientific EffectInductive coupling: Electromagnetic Induction

Implementation Method 3

signal coupling structures on the die to allow communication of signals between the integrated circuit portions while maintaining the galvanic isolation therebetween

Methodology Applied
Scientific EffectGiant magnetoresistance: Magnetoresistance

Data Source

PatentUS9742391B2Single-chip multi-domain galvanic isolation device and method
Publication Date: 2017.08.22 THE SILANNA GRP
  • US9742391B2 patent drawing
  • US9742391B2 patent drawing
  • US9742391B2 patent drawing

AI summary

An integrated circuit, including:at least three integrated circuit portions mutually spaced on a single electrically insulating die, the integrated circuit portions being mutually galvanically isolated; andsignal coupling structures on the die to allow communication of signals between the integrated circuit portions while maintaining the galvanic isolation therebetween.