Single-Chip SWIR Image Sensor Integration Without Flip-Chip Bonding

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Solution Overview

Problem

The existing image sensors that detect short-wave infrared require sophisticated hybrid integration of separate photodetector and read out integrated circuit (ROIC) chips, leading to low productivity due to the complexity of flip chip bonding with millions of pads of micrometer size.

Innovation Solution

Integration of ROIC and photodetector into a single chip on a silicon substrate, where the photodetector includes germanium patterns of different conductivity types laminated perpendicular to the substrate, with a buried insulation pattern and metal lines connecting them, allowing for a single-chip image sensor design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If flip chip bonding is used to connect separate photodetector and ROIC chips, then the image sensor can be assembled, but productivity is low due to the highly sophisticated hybrid integration technology required

Engineering Contradiction:
ImproveproductivityVSAvoidhybrid integration technology complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the photodetector and ROIC into a single integrated chip structure. The ROIC is formed in a first semiconductor substrate while the photodetector is formed in a second semiconductor substrate, and these substrates are bonded together to create a unified device. This eliminates the need for separate chip assembly and complex hybrid integration, directly resolving the productivity issue while maintaining functional separation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a bonding interface between the first and second semiconductor substrates that serves as an intermediary connection. This bonding structure includes aligned pads and conductive paths that facilitate electrical connection between the ROIC and photodetector without requiring external wire bonding or complex hybrid integration techniques, thereby simplifying the overall manufacturing process.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If flip chip bonding is performed with micrometer-sized pads exceeding one million in number, then electrical connections are established, but the process becomes highly sophisticated and time-consuming

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidbonding process time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary alignment and bonding preparation during the semiconductor fabrication process itself. The pads on both substrates are pre-formed and positioned with precise alignment marks before the bonding step. This preliminary preparation allows for rapid bonding without requiring time-consuming post-fabrication alignment procedures, reducing both process time and complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical flip chip bonding process with a direct substrate bonding approach that can be performed using standard semiconductor fabrication equipment. Instead of requiring specialized hybrid integration tools for manipulating and bonding individual chips, the process uses wafer-level bonding techniques that are already integrated into conventional semiconductor manufacturing lines, significantly reducing process time.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If separate chips are used for photodetector and ROIC, then functional specialization is achieved, but integration complexity increases

Engineering Contradiction:
Improvefunctional specializationVSAvoidintegration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the device into two functionally specialized substrates: a first semiconductor substrate containing the ROIC and a second semiconductor substrate containing the photodetector. Each substrate is independently fabricated with its specific functional elements, maintaining functional specialization while enabling simplified integration through direct substrate bonding rather than complex chip assembly.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances productivity during mass production by simplifying the integration process and improving reliability, while maintaining sensitivity to short-wave infrared wavelengths, enabling applications such as night vision and pollution detection.

Implementation Method 1

The photodetectors are sensitive to incident light. The ROIC quantitatively evaluates outputs from the photodetectors and processes the outputs into images.

Methodology Applied
Scientific EffectPhotoelectric Effect: Photoelectric Effect

Implementation Method 2

an image sensor that acquires an image in a short-wave infrared band

Methodology Applied
Scientific EffectAbsorption (EM radiation): Absorption (EM radiation)

Data Source

PatentUS20240243159A1Image sensor and manufacturing method thereof
Publication Date: 2024.07.18 ELECTRONICS & TELECOMM RES INST
  • US20240243159A1 patent drawing
  • US20240243159A1 patent drawing
  • US20240243159A1 patent drawing

AI summary

The present disclosure relates to an image sensor including a silicon substrate having a first conductivity type, and a read out integrated circuit (ROIC) and a photodetector disposed on the silicon substrate. The ROIC and the photodetector are spaced apart from each other in a first direction parallel to a top surface of the silicon substrate. The photodetector includes a first germanium pattern having the first conductivity type and a semiconductor pattern having a second conductivity type different from the first conductivity type, which are laminated in a direction perpendicular to the top surface of the silicon substrate. The first germanium pattern contacts the silicon substrate.