Single-Clock Serial Data Link for Low-Power Synchronization
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Solution Overview
Problem
Existing serial data communication systems require complex wiring and high power consumption due to the need for multiple clock lines and high frequency clock signals, which increases costs and power usage.
Innovation Solution
A serial data communication system that generates a control signal based on the received data signal to derive both transmit and receive clock signals from a single clock signal, reducing the need for multiple clock lines and high frequency signals, and using a local clock generation device with adjustable duty cycles to minimize power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple clock lines are used for transmitting and receiving data, then reliable clock synchronization is achieved, but wiring complexity and power consumption increase
Solution Approach 1:
The patent merges the transmit clock and receive clock into a single clock signal that is shared between transmission and reception functions. The clock generator produces one clock signal that is used by both the transmitter and receiver, eliminating the need for separate clock lines and reducing wiring complexity while maintaining reliable synchronization.
Solution Approach 2:
The single clock signal serves multiple functions - it is used for both transmitting data and receiving data. The clock generator is designed to provide a universal clock signal that can be used for multiple communication purposes, reducing the overall number of clock lines required in the system.
2Speed
If high frequency clock signals are used, then data transmission speed is improved, but power consumption increases significantly
Solution Approach 1:
The patent implements dynamic clock frequency adjustment where the clock generator can change the frequency of the clock signal based on the current communication requirements. The system uses a phase-locked loop (PLL) to dynamically adjust the clock frequency, allowing high speeds when needed while consuming less power during low-activity periods.
Solution Approach 2:
The system changes the clock frequency parameter dynamically based on communication needs. The clock generator adjusts the frequency parameter of the clock signal to match the required data transmission rate, using higher frequencies for fast data transfer and lower frequencies for idle or low-bandwidth communication, thereby optimizing power consumption.
3Reliability
If a local clock generator is provided for each device, then clock independence is achieved, but the number of connection lines increases
Solution Approach 1:
The patent combines the clock generation function into a single centralized clock generator that serves multiple devices. Instead of each device having its own independent clock generator, the system uses one shared clock generator that provides clock signals to all transmitting and receiving devices, reducing the number of connection lines while maintaining clock independence through proper signal distribution.
Data Source
Figure 1
Figure 2~3
AI summary
A serial data communication system (10) comprises - a local clock generation device (12) adapted for generating a clock signal (16) with a duty cycle depending on a control signal (18), and - a serial data communication control device (14) adapted for generating the control signal (18) depending on the receipt of a serial data signal and for deriving a transmit and receive clock signal (20, 21) from the clock signal (16) received from the local clock generation device (12).